All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Chengwen Feng" <fengchengwen@huawei.com>
Cc: linux-pci@vger.kernel.org, kvm@vger.kernel.org
Subject: Re: [PATCH v20 10/16] PCI/TPH: Add pcie_tph_set_st_entries() batch ST entry programming helper
Date: Tue, 14 Jul 2026 11:11:14 +0000	[thread overview]
Message-ID: <20260714111115.34CD11F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260714104325.54444-11-fengchengwen@huawei.com>

Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:

New issues:
- [High] API return value collision: PCIBIOS error codes masquerade as successful batch writes.
- [High] Partial success return value hides fatal global TPH disablement.
- [Medium] Calling the batch function with count=0 disrupts hardware TPH capability state.

Pre-existing issues:
- [High] Integer overflow in bounds check allows out-of-bounds config space writes.
- [Medium] Lockless data races on PCI_TPH_CTRL during concurrent updates.
--

--- Patch [10]: [PATCH v20 10/16] PCI/TPH: Add pcie_tph_set_st_entries() batch ST entry programming helper ---
commit ef45067b72f46179b7e7c22243bc81d01093a5bd
Author: Chengwen Feng <fengchengwen@huawei.com>
Subject: PCI/TPH: Add pcie_tph_set_st_entries() batch ST entry programming helper

This patch introduces a batch variant for programming contiguous Steering Tag
(ST) table entries. It modifies the existing pcie_tph_set_st_entry to act as a
wrapper around the new pcie_tph_set_st_entries helper. The batch helper
toggles TPH once per batch for better performance.

> diff --git a/drivers/pci/tph.c b/drivers/pci/tph.c
> index 633dc6308b68c..8194f8b45e3c6 100644
> --- a/drivers/pci/tph.c
> +++ b/drivers/pci/tph.c

[ ... ]

> @@ -378,7 +376,7 @@ int pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index, u16 tag)
>  
>  	/* No need to write tag if device is in "No ST Mode" */
>  	if (pdev->tph_mode == PCI_TPH_ST_NS_MODE)
> -		return 0;
> +		return count;
>  
>  	/*
>  	 * Disable TPH before updating ST to avoid potential instability as
>  	 * cautioned in PCIe r6.2, sec 6.17.3, "ST Modes of Operation"
>  	 */

[Severity: Medium]
Will this unnecessarily disrupt the hardware state if the function is called
with count = 0? Since the loop will be bypassed, TPH will be disabled and
immediately re-enabled without writing any tags.

>  	set_ctrl_reg_req_en(pdev, PCI_TPH_REQ_DISABLE);

[Severity: Medium]
This is a pre-existing issue, but can concurrent updates cause lockless data
races on the PCI_TPH_CTRL register?

If multiple threads attempt to program the ST table concurrently, they may
race in set_ctrl_reg_req_en() which performs a lockless read-modify-write.
Could one thread re-enable TPH while another is midway through writing its
entries?

>  
>  	loc = pcie_tph_get_st_table_loc(pdev);
> -
> -	switch (loc) {
> -	case PCI_TPH_LOC_MSIX:
> -		err = pci_msix_write_tph_tag(pdev, index, tag);
> -		break;
> -	case PCI_TPH_LOC_CAP:
> -		err = write_tag_to_st_table(pdev, index, tag);
> -		break;
> -	default:
> -		err = -EINVAL;
> -	}
> -
> -	if (err) {
> -		pcie_disable_tph(pdev);
> -		return err;
> +	for (i = 0; i < count; i++) {
> +		switch (loc) {
> +		case PCI_TPH_LOC_MSIX:
> +			err = pci_msix_write_tph_tag(pdev, start + i, tags[i]);
> +			break;
> +		case PCI_TPH_LOC_CAP:
> +			err = write_tag_to_st_table(pdev, start + i, tags[i]);

[Severity: High]
This is a pre-existing issue, but does this bounds check in
write_tag_to_st_table() have an integer overflow vulnerability?

write_tag_to_st_table(struct pci_dev *pdev, int index, u16 tag) {
    ...
    if (index >= st_table_size)
        return -ENXIO;
    ...
}

Since write_tag_to_st_table() takes a signed int for the index, and we are
passing unsigned int start + i, could a large start value overflow to a
negative integer? A negative index would bypass the bounds check and cause an
out-of-bounds config space write.

> +			break;
> +		default:
> +			err = -EINVAL;
> +		}
> +		if (err != 0) {
> +			pci_err(pdev, "failed to set steering tag: %s table, index=%u, tags=%u, ret=%d\n",
> +				(loc == PCI_TPH_LOC_MSIX) ? "MSI-X" : "ST",
> +				start + i, tags[i], err);
> +			pcie_disable_tph(pdev);
> +			return i > 0 ? i : err;

[Severity: High]
If write_tag_to_st_table() fails on the first iteration where i == 0, could it
return a positive error code from pci_write_config_word() such as
PCIBIOS_BAD_REGISTER_NUMBER?

Because the return statement yields err when i == 0, a positive error code
would be interpreted by the caller of pcie_tph_set_st_entries() as a
successful batch write count.

[Severity: High]
If the loop fails on an entry after the first, this calls
pcie_disable_tph(pdev) which disables TPH for the entire device. However,
returning i yields a positive partial success count to the caller.

Does this leave the caller assuming the first i entries are functional when
TPH has actually been completely disabled?

> +		}
>  	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260714104325.54444-1-fengchengwen@huawei.com?part=10

  reply	other threads:[~2026-07-14 11:11 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-14 10:43 [PATCH v20 00/16] vfio/pci: Add PCIe TPH support Chengwen Feng
2026-07-14 10:43 ` [PATCH v20 01/16] PCI/TPH: Add requester/completer type helpers Chengwen Feng
2026-07-14 10:54   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 02/16] dma-buf: add optional get_pci_tph() callback Chengwen Feng
2026-07-14 10:50   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 03/16] vfio/pci: implement get_pci_tph and DMA_BUF_TPH feature Chengwen Feng
2026-07-14 10:50   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 04/16] PCI/TPH: Fix pcie_tph_get_st_table_loc() field extraction Chengwen Feng
2026-07-14 10:54   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 05/16] PCI/TPH: Fix tph_enabled concurrent update race by bitfield packing Chengwen Feng
2026-07-14 11:00   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 06/16] PCI/TPH: Cache negotiated max requester type at probe time Chengwen Feng
2026-07-14 10:57   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 07/16] PCI/TPH: Refactor pcie_enable_tph and add requester variant Chengwen Feng
2026-07-14 10:58   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 08/16] PCI/TPH: Refactor pcie_tph_get_cpu_st & " Chengwen Feng
2026-07-14 11:00   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 09/16] PCI/TPH: Add macros to check standard and extended TPH support Chengwen Feng
2026-07-14 11:07   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 10/16] PCI/TPH: Add pcie_tph_set_st_entries() batch ST entry programming helper Chengwen Feng
2026-07-14 11:11   ` sashiko-bot [this message]
2026-07-14 10:43 ` [PATCH v20 11/16] PCI/TPH: Add pci_tph_dsm_supported() helper to detect device TPH ST _DSM Chengwen Feng
2026-07-14 11:27   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 12/16] vfio/pci: Add basic NO-ST TPH VFIO device feature support Chengwen Feng
2026-07-14 11:10   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 13/16] vfio/pci: Add IV-ST TPH policy and VFIO TPH_ST batch programming support Chengwen Feng
2026-07-14 11:14   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 14/16] vfio/pci: Add DS-ST TPH policy and extend TPH_RESOLVE capabilities Chengwen Feng
2026-07-14 11:12   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 15/16] vfio/pci: Sync core PCI TPH software state across device lifecycle and resets Chengwen Feng
2026-07-14 11:28   ` sashiko-bot
2026-07-14 10:43 ` [PATCH v20 16/16] vfio/pci: Expose per-device TPH state via debugfs Chengwen Feng
2026-07-14 11:17   ` sashiko-bot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260714111115.34CD11F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=fengchengwen@huawei.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.