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Wed, 15 Jul 2026 03:33:16 +0000 From: Jamin Lin To: =?iso-8859-1?Q?Daniel_P=2E_Berrang=E9?= , =?iso-8859-1?Q?C=E9dric_Le_Goater?= , Peter Maydell , Steven Lee , Troy Lee , Kane Chen , Andrew Jeffery , Joel Stanley , Eric Blake , Markus Armbruster , Fabiano Rosas , Laurent Vivier , Paolo Bonzini , "open list:All patches CC here" , "open list:ASPEED BMCs" CC: Jamin Lin , Troy Lee Subject: [PATCH v2 02/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2500 Thread-Topic: [PATCH v2 02/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2500 Thread-Index: AQHdFAqssBuWiqgJLk6Ryx/1NHW+oA== Date: Wed, 15 Jul 2026 03:33:16 +0000 Message-ID: <20260715033311.1648424-3-jamin_lin@aspeedtech.com> References: <20260715033311.1648424-1-jamin_lin@aspeedtech.com> In-Reply-To: <20260715033311.1648424-1-jamin_lin@aspeedtech.com> Accept-Language: zh-TW, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=aspeedtech.com; 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envelope-from=jamin_lin@aspeedtech.com; helo=TYPPR03CU001.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add a crypto known-answer test harness and exercise the AST2500, which=0A= uses the crypto engine's direct access mode. Each mode (AES/DES/3DES in=0A= ECB and CBC) is a separate test that checks the ciphertext, the=0A= plaintext round-trip and, for CBC, the chaining IV written back to the=0A= context buffer.=0A= =0A= The key/IV/plaintext/ciphertext values are taken verbatim from the Linux=0A= kernel crypto self-test templates in crypto/testmgr.h.=0A= =0A= Signed-off-by: Jamin Lin =0A= ---=0A= tests/qtest/aspeed-hace-utils.h | 16 ++=0A= tests/qtest/aspeed-hace-utils.c | 325 ++++++++++++++++++++++++++++++++=0A= tests/qtest/aspeed_hace-test.c | 6 +=0A= tests/qtest/meson.build | 6 +-=0A= 4 files changed, 351 insertions(+), 2 deletions(-)=0A= =0A= diff --git a/tests/qtest/aspeed-hace-utils.h b/tests/qtest/aspeed-hace-util= s.h=0A= index 27ab2bb975..13feaa61e4 100644=0A= --- a/tests/qtest/aspeed-hace-utils.h=0A= +++ b/tests/qtest/aspeed-hace-utils.h=0A= @@ -79,5 +79,21 @@ void aspeed_test_sha512_accum(const char *machine, const= uint32_t base,=0A= void aspeed_test_addresses(const char *machine, const uint32_t base,=0A= const struct AspeedMasks *expected);=0A= =0A= +/*=0A= + * Cipher modes a SoC's crypto engine supports, for aspeed_add_crypto_test= s().=0A= + */=0A= +enum {=0A= + CRYPT_MODE_ECB =3D 1 << 0,=0A= + CRYPT_MODE_CBC =3D 1 << 1,=0A= +};=0A= +=0A= +/*=0A= + * Register the crypto known-answer tests that @modes selects (a mask of= =0A= + * CRYPT_MODE_*) for the given machine. Each test is named=0A= + * "/hace/crypto/".=0A= + */=0A= +void aspeed_add_crypto_tests(const char *prefix, const char *machine,=0A= + uint32_t base, uint64_t dram, uint32_t modes)= ;=0A= +=0A= #endif /* TESTS_ASPEED_HACE_UTILS_H */=0A= =0A= diff --git a/tests/qtest/aspeed-hace-utils.c b/tests/qtest/aspeed-hace-util= s.c=0A= index 25450a296b..0355dd47af 100644=0A= --- a/tests/qtest/aspeed-hace-utils.c=0A= +++ b/tests/qtest/aspeed-hace-utils.c=0A= @@ -9,6 +9,7 @@=0A= #include "libqtest.h"=0A= #include "qemu/bitops.h"=0A= #include "qemu/bswap.h"=0A= +#include "crypto/cipher.h"=0A= #include "aspeed-hace-utils.h"=0A= =0A= /*=0A= @@ -645,3 +646,327 @@ void aspeed_test_addresses(const char *machine, const= uint32_t base,=0A= qtest_quit(s);=0A= }=0A= =0A= +/*=0A= + * Crypto engine register layout (offsets from the HACE base).=0A= + */=0A= +#define HACE_CRYPTO_SRC 0x00=0A= +#define HACE_CRYPTO_DEST 0x04=0A= +#define HACE_CRYPTO_CONTEXT 0x08=0A= +#define HACE_CRYPTO_DATA_LEN 0x0c=0A= +#define HACE_CRYPTO_CMD 0x10=0A= +=0A= +/* Crypto command bits */=0A= +#define HACE_CMD_ENCRYPT BIT(7)=0A= +#define HACE_CMD_ISR_EN BIT(12)=0A= +#define HACE_CMD_DES_SELECT BIT(16)=0A= +#define HACE_CMD_TRIPLE_DES BIT(17)=0A= +#define HACE_CMD_SRC_SG_CTRL BIT(18)=0A= +#define HACE_CMD_DST_SG_CTRL BIT(19)=0A= +#define HACE_CMD_OP_MODE_MASK (0x7 << 4)=0A= +#define HACE_CMD_ECB (0x0 << 4)=0A= +#define HACE_CMD_CBC (0x1 << 4)=0A= +#define HACE_CMD_AES128 (0x0 << 2)=0A= +=0A= +/* Context buffer layout: IV (DES at +8), key at +0x10 */=0A= +#define HACE_CTX_KEY_OFFSET 0x10=0A= +#define HACE_CTX_SIZE 0x30=0A= +=0A= +/*=0A= + * Crypto known-answer test vectors, taken verbatim from the Linux kernel= =0A= + * crypto self-test templates in crypto/testmgr.h:=0A= + *=0A= + * https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tr= ee/crypto/testmgr.h?h=3Dv6.18=0A= + *=0A= + * The originating template is noted above each block. CTR and the longer = CBC=0A= + * vectors are truncated to a single block (still a valid known-answer tes= t as=0A= + * the first block only depends on the IV).=0A= + */=0A= +=0A= +/* aes_tv_template[0] (FIPS-197) */=0A= +static const uint8_t aes128_ecb_key[16] =3D {=0A= + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,=0A= + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f };=0A= +static const uint8_t aes128_ecb_ptext[16] =3D {=0A= + 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,=0A= + 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff };=0A= +static const uint8_t aes128_ecb_ctext[16] =3D {=0A= + 0x69, 0xc4, 0xe0, 0xd8, 0x6a, 0x7b, 0x04, 0x30,=0A= + 0xd8, 0xcd, 0xb7, 0x80, 0x70, 0xb4, 0xc5, 0x5a };=0A= +=0A= +/* aes_cbc_tv_template[0] (RFC 3602) */=0A= +static const uint8_t aes128_cbc_key[16] =3D {=0A= + 0x06, 0xa9, 0x21, 0x40, 0x36, 0xb8, 0xa1, 0x5b,=0A= + 0x51, 0x2e, 0x03, 0xd5, 0x34, 0x12, 0x00, 0x06 };=0A= +static const uint8_t aes128_cbc_iv[16] =3D {=0A= + 0x3d, 0xaf, 0xba, 0x42, 0x9d, 0x9e, 0xb4, 0x30,=0A= + 0xb4, 0x22, 0xda, 0x80, 0x2c, 0x9f, 0xac, 0x41 };=0A= +static const uint8_t aes128_cbc_ptext[16] =3D {=0A= + 0x53, 0x69, 0x6e, 0x67, 0x6c, 0x65, 0x20, 0x62,=0A= + 0x6c, 0x6f, 0x63, 0x6b, 0x20, 0x6d, 0x73, 0x67 };=0A= +static const uint8_t aes128_cbc_ctext[16] =3D {=0A= + 0xe3, 0x53, 0x77, 0x9c, 0x10, 0x79, 0xae, 0xb8,=0A= + 0x27, 0x08, 0x94, 0x2d, 0xbe, 0x77, 0x18, 0x1a };=0A= +static const uint8_t aes128_cbc_ivout[16] =3D {=0A= + 0xe3, 0x53, 0x77, 0x9c, 0x10, 0x79, 0xae, 0xb8,=0A= + 0x27, 0x08, 0x94, 0x2d, 0xbe, 0x77, 0x18, 0x1a };=0A= +=0A= +/* des_tv_template[0] (Applied Cryptography) */=0A= +static const uint8_t des_ecb_key[8] =3D {=0A= + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef };=0A= +static const uint8_t des_ecb_ptext[8] =3D {=0A= + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xe7 };=0A= +static const uint8_t des_ecb_ctext[8] =3D {=0A= + 0xc9, 0x57, 0x44, 0x25, 0x6a, 0x5e, 0xd3, 0x1d };=0A= +=0A= +/* des_cbc_tv_template[0] (OpenSSL), first block */=0A= +static const uint8_t des_cbc_key[8] =3D {=0A= + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef };=0A= +static const uint8_t des_cbc_iv[8] =3D {=0A= + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 };=0A= +static const uint8_t des_cbc_ptext[8] =3D {=0A= + 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x20 };=0A= +static const uint8_t des_cbc_ctext[8] =3D {=0A= + 0xcc, 0xd1, 0x73, 0xff, 0xab, 0x20, 0x39, 0xf4 };=0A= +=0A= +/* des3_ede_tv_template[0] (OpenSSL) */=0A= +static const uint8_t tdes_ecb_key[24] =3D {=0A= + 0x01, 0x23, 0x45, 0x67, 0x89, 0xab, 0xcd, 0xef,=0A= + 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,=0A= + 0xfe, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10 };=0A= +static const uint8_t tdes_ecb_ptext[8] =3D {=0A= + 0x73, 0x6f, 0x6d, 0x65, 0x64, 0x61, 0x74, 0x61 };=0A= +static const uint8_t tdes_ecb_ctext[8] =3D {=0A= + 0x18, 0xd7, 0x48, 0xe5, 0x63, 0x62, 0x05, 0x72 };=0A= +=0A= +/* des3_ede_cbc_tv_template[0] (OpenSSL), first block */=0A= +static const uint8_t tdes_cbc_key[24] =3D {=0A= + 0xe9, 0xc0, 0xff, 0x2e, 0x76, 0x0b, 0x64, 0x24,=0A= + 0x44, 0x4d, 0x99, 0x5a, 0x12, 0xd6, 0x40, 0xc0,=0A= + 0xea, 0xc2, 0x84, 0xe8, 0x14, 0x95, 0xdb, 0xe8 };=0A= +static const uint8_t tdes_cbc_iv[8] =3D {=0A= + 0x7d, 0x33, 0x88, 0x93, 0x0f, 0x93, 0xb2, 0x42 };=0A= +static const uint8_t tdes_cbc_ptext[8] =3D {=0A= + 0x6f, 0x54, 0x20, 0x6f, 0x61, 0x4d, 0x79, 0x6e };=0A= +static const uint8_t tdes_cbc_ctext[8] =3D {=0A= + 0x0e, 0x2d, 0xb6, 0x97, 0x3c, 0x56, 0x33, 0xf4 };=0A= +=0A= +typedef struct CryptTest {=0A= + QCryptoCipherMode mode;=0A= + QCryptoCipherAlgo alg;=0A= + /* expected context IV after encrypt, or NULL */=0A= + const uint8_t *iv_out;=0A= + const uint8_t *ptext;=0A= + const uint8_t *ctext;=0A= + const uint8_t *key;=0A= + const uint8_t *iv;=0A= + const char *name;=0A= + size_t keylen;=0A= + /* algorithm | mode | key size selection */=0A= + uint32_t cmd;=0A= + size_t ivlen;=0A= + size_t len;=0A= +} CryptTest;=0A= +=0A= +static const CryptTest crypt_tests[] =3D {=0A= + {=0A= + .name =3D "aes128-ecb",=0A= + .cmd =3D HACE_CMD_AES128 | HACE_CMD_ECB,=0A= + .alg =3D QCRYPTO_CIPHER_ALGO_AES_128,=0A= + .mode =3D QCRYPTO_CIPHER_MODE_ECB,=0A= + .key =3D aes128_ecb_key,=0A= + .keylen =3D sizeof(aes128_ecb_key),=0A= + .ptext =3D aes128_ecb_ptext,=0A= + .ctext =3D aes128_ecb_ctext,=0A= + .len =3D sizeof(aes128_ecb_ptext),=0A= + },=0A= + {=0A= + .name =3D "aes128-cbc",=0A= + .cmd =3D HACE_CMD_AES128 | HACE_CMD_CBC,=0A= + .alg =3D QCRYPTO_CIPHER_ALGO_AES_128,=0A= + .mode =3D QCRYPTO_CIPHER_MODE_CBC,=0A= + .key =3D aes128_cbc_key,=0A= + .keylen =3D sizeof(aes128_cbc_key),=0A= + .iv =3D aes128_cbc_iv,=0A= + .ivlen =3D sizeof(aes128_cbc_iv),=0A= + .ptext =3D aes128_cbc_ptext,=0A= + .ctext =3D aes128_cbc_ctext,=0A= + .iv_out =3D aes128_cbc_ivout,=0A= + .len =3D sizeof(aes128_cbc_ptext),=0A= + },=0A= + {=0A= + .name =3D "des-ecb",=0A= + .cmd =3D HACE_CMD_DES_SELECT | HACE_CMD_ECB,=0A= + .alg =3D QCRYPTO_CIPHER_ALGO_DES,=0A= + .mode =3D QCRYPTO_CIPHER_MODE_ECB,=0A= + .key =3D des_ecb_key,=0A= + .keylen =3D sizeof(des_ecb_key),=0A= + .ptext =3D des_ecb_ptext,=0A= + .ctext =3D des_ecb_ctext,=0A= + .len =3D sizeof(des_ecb_ptext),=0A= + },=0A= + {=0A= + .name =3D "des-cbc",=0A= + .cmd =3D HACE_CMD_DES_SELECT | HACE_CMD_CBC,=0A= + .alg =3D QCRYPTO_CIPHER_ALGO_DES,=0A= + .mode =3D QCRYPTO_CIPHER_MODE_CBC,=0A= + .key =3D des_cbc_key,=0A= + .keylen =3D sizeof(des_cbc_key),=0A= + .iv =3D des_cbc_iv,=0A= + .ivlen =3D sizeof(des_cbc_iv),=0A= + .ptext =3D des_cbc_ptext,=0A= + .ctext =3D des_cbc_ctext,=0A= + .len =3D sizeof(des_cbc_ptext),=0A= + },=0A= + {=0A= + .name =3D "des3_ede-ecb",=0A= + .cmd =3D HACE_CMD_DES_SELECT | HACE_CMD_TRIPLE_DES | HACE_CMD_ECB,= =0A= + .alg =3D QCRYPTO_CIPHER_ALGO_3DES,=0A= + .mode =3D QCRYPTO_CIPHER_MODE_ECB,=0A= + .key =3D tdes_ecb_key,=0A= + .keylen =3D sizeof(tdes_ecb_key),=0A= + .ptext =3D tdes_ecb_ptext,=0A= + .ctext =3D tdes_ecb_ctext,=0A= + .len =3D sizeof(tdes_ecb_ptext),=0A= + },=0A= + {=0A= + .name =3D "des3_ede-cbc",=0A= + .cmd =3D HACE_CMD_DES_SELECT | HACE_CMD_TRIPLE_DES | HACE_CMD_CBC,= =0A= + .alg =3D QCRYPTO_CIPHER_ALGO_3DES,=0A= + .mode =3D QCRYPTO_CIPHER_MODE_CBC,=0A= + .key =3D tdes_cbc_key,=0A= + .keylen =3D sizeof(tdes_cbc_key),=0A= + .iv =3D tdes_cbc_iv,=0A= + .ivlen =3D sizeof(tdes_cbc_iv),=0A= + .ptext =3D tdes_cbc_ptext,=0A= + .ctext =3D tdes_cbc_ctext,=0A= + .len =3D sizeof(tdes_cbc_ptext),=0A= + },=0A= +};=0A= +=0A= +/* DRAM offsets for the crypto test source, destination and context buffer= s. */=0A= +#define CRYPT_OFF_SRC 0x10000=0A= +#define CRYPT_OFF_DST 0x20000=0A= +#define CRYPT_OFF_CTX 0x30000=0A= +=0A= +/* Describes one registered crypto test (qtest_add_data_func() data pointe= r). */=0A= +typedef struct AspeedCryptoTest {=0A= + const char *machine;=0A= + uint64_t dram;=0A= + uint32_t base;=0A= + int index;=0A= +} AspeedCryptoTest;=0A= +=0A= +/* Map a command's operation mode (HACE10[6:4]) to a CRYPT_MODE_* flag. */= =0A= +static uint32_t crypt_mode_flag(uint32_t cmd)=0A= +{=0A= + switch (cmd & HACE_CMD_OP_MODE_MASK) {=0A= + case HACE_CMD_ECB:=0A= + return CRYPT_MODE_ECB;=0A= + case HACE_CMD_CBC:=0A= + return CRYPT_MODE_CBC;=0A= + default:=0A= + return 0;=0A= + }=0A= +}=0A= +=0A= +static void crypt_write_ctx(QTestState *s, uint64_t ctx_addr,=0A= + const CryptTest *t)=0A= +{=0A= + size_t iv_off =3D (t->cmd & HACE_CMD_DES_SELECT) ? 8 : 0;=0A= + uint8_t ctx[HACE_CTX_SIZE] =3D { 0 };=0A= +=0A= + if (t->iv) {=0A= + memcpy(ctx + iv_off, t->iv, t->ivlen);=0A= + }=0A= + memcpy(ctx + HACE_CTX_KEY_OFFSET, t->key, t->keylen);=0A= + qtest_memwrite(s, ctx_addr, ctx, sizeof(ctx));=0A= +}=0A= +=0A= +/* Run one crypto operation in direct access mode and read back the result= . */=0A= +static void crypt_run_direct(QTestState *s, uint32_t base, uint64_t dram,= =0A= + const CryptTest *t, bool encrypt, uint8_t *ou= t)=0A= +{=0A= + const uint8_t *in =3D encrypt ? t->ptext : t->ctext;=0A= + uint32_t cmd =3D t->cmd | HACE_CMD_ISR_EN;=0A= + uint64_t src =3D dram + CRYPT_OFF_SRC;=0A= + uint64_t dst =3D dram + CRYPT_OFF_DST;=0A= + uint64_t ctx =3D dram + CRYPT_OFF_CTX;=0A= +=0A= + if (encrypt) {=0A= + cmd |=3D HACE_CMD_ENCRYPT;=0A= + }=0A= +=0A= + crypt_write_ctx(s, ctx, t);=0A= + qtest_memwrite(s, src, in, t->len);=0A= +=0A= + qtest_writel(s, base + HACE_CRYPTO_SRC, (uint32_t)src);=0A= + qtest_writel(s, base + HACE_CRYPTO_DEST, (uint32_t)dst);=0A= + qtest_writel(s, base + HACE_CRYPTO_CONTEXT, (uint32_t)ctx);=0A= + qtest_writel(s, base + HACE_CRYPTO_DATA_LEN, t->len);=0A= + qtest_writel(s, base + HACE_CRYPTO_CMD, cmd);=0A= +=0A= + g_assert_cmphex(qtest_readl(s, base + HACE_STS) & HACE_CRYPTO_ISR, =3D= =3D,=0A= + HACE_CRYPTO_ISR);=0A= + qtest_writel(s, base + HACE_STS, HACE_CRYPTO_ISR);=0A= +=0A= + qtest_memread(s, dst, out, t->len);=0A= +}=0A= +=0A= +static void aspeed_test_crypto_direct(const void *data)=0A= +{=0A= + const AspeedCryptoTest *c =3D data;=0A= + const CryptTest *t =3D &crypt_tests[c->index];=0A= + QTestState *s =3D qtest_init(c->machine);=0A= + uint8_t out[64];=0A= + uint8_t iv[16];=0A= + size_t iv_off;=0A= +=0A= + g_assert_cmpuint(t->len, <=3D, sizeof(out));=0A= +=0A= + /* Encrypt: ptext -> ctext */=0A= + crypt_run_direct(s, c->base, c->dram, t, true, out);=0A= + g_assert_cmpmem(out, t->len, t->ctext, t->len);=0A= +=0A= + if (t->iv_out) {=0A= + iv_off =3D (t->cmd & HACE_CMD_DES_SELECT) ? 8 : 0;=0A= + qtest_memread(s, c->dram + CRYPT_OFF_CTX + iv_off, iv, t->ivlen);= =0A= + g_assert_cmpmem(iv, t->ivlen, t->iv_out, t->ivlen);=0A= + }=0A= +=0A= + /* Decrypt: ctext -> ptext */=0A= + crypt_run_direct(s, c->base, c->dram, t, false, out);=0A= + g_assert_cmpmem(out, t->len, t->ptext, t->len);=0A= +=0A= + qtest_quit(s);=0A= +}=0A= +=0A= +void aspeed_add_crypto_tests(const char *prefix, const char *machine,=0A= + uint32_t base, uint64_t dram, uint32_t modes)= =0A= +{=0A= + int i;=0A= +=0A= + for (i =3D 0; i < ARRAY_SIZE(crypt_tests); i++) {=0A= + g_autofree char *path =3D NULL;=0A= + AspeedCryptoTest *t;=0A= +=0A= + if (!(modes & crypt_mode_flag(crypt_tests[i].cmd))) {=0A= + continue;=0A= + }=0A= +=0A= + if (!qcrypto_cipher_supports(crypt_tests[i].alg,=0A= + crypt_tests[i].mode)) {=0A= + g_printerr("# skip unsupported %s\n", crypt_tests[i].name);=0A= + continue;=0A= + }=0A= +=0A= + path =3D g_strdup_printf("%s/hace/crypto/%s", prefix,=0A= + crypt_tests[i].name);=0A= + t =3D g_new0(AspeedCryptoTest, 1);=0A= + t->machine =3D machine;=0A= + t->base =3D base;=0A= + t->dram =3D dram;=0A= + t->index =3D i;=0A= + qtest_add_data_func_full(path, t, aspeed_test_crypto_direct, g_fre= e);=0A= + }=0A= +}=0A= +=0A= diff --git a/tests/qtest/aspeed_hace-test.c b/tests/qtest/aspeed_hace-test.= c=0A= index 38777020ca..4cb4c475e9 100644=0A= --- a/tests/qtest/aspeed_hace-test.c=0A= +++ b/tests/qtest/aspeed_hace-test.c=0A= @@ -229,6 +229,12 @@ int main(int argc, char **argv)=0A= qtest_add_func("ast2500/hace/sha256", test_sha256_ast2500);=0A= qtest_add_func("ast2500/hace/md5", test_md5_ast2500);=0A= =0A= + /*=0A= + * The AST2500 crypto engine uses direct access mode and supports ECB/= CBC.=0A= + */=0A= + aspeed_add_crypto_tests("ast2500", "-machine ast2500-evb", 0x1e6e3000,= =0A= + 0x80000000, CRYPT_MODE_ECB | CRYPT_MODE_CBC);= =0A= +=0A= qtest_add_func("ast2400/hace/addresses", test_addresses_ast2400);=0A= qtest_add_func("ast2400/hace/sha512", test_sha512_ast2400);=0A= qtest_add_func("ast2400/hace/sha256", test_sha256_ast2400);=0A= diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build=0A= index 56ff860e21..d5bde77689 100644=0A= --- a/tests/qtest/meson.build=0A= +++ b/tests/qtest/meson.build=0A= @@ -389,9 +389,11 @@ if get_option('replication').allowed()=0A= endif=0A= =0A= qtests =3D {=0A= - 'aspeed_hace-test': files('aspeed-hace-utils.c', 'aspeed_hace-test.c'),= =0A= + 'aspeed_hace-test': [files('aspeed-hace-utils.c', 'aspeed_hace-test.c'),= =0A= + crypto],=0A= 'aspeed_smc-test': files('aspeed-smc-utils.c', 'aspeed_smc-test.c'),=0A= - 'ast2700-hace-test': files('aspeed-hace-utils.c', 'ast2700-hace-test.c')= ,=0A= + 'ast2700-hace-test': [files('aspeed-hace-utils.c', 'ast2700-hace-test.c'= ),=0A= + crypto],=0A= 'ast2700-smc-test': files('aspeed-smc-utils.c', 'ast2700-smc-test.c'),= =0A= 'bios-tables-test': [io, 'boot-sector.c', 'acpi-utils.c', 'tpm-emu.c'],= =0A= 'cdrom-test': files('boot-sector.c'),=0A= -- =0A= 2.43.0=0A=