From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: vinod.govindapillai@intel.com, suraj.kandpal@intel.com,
Uma Shankar <uma.shankar@intel.com>
Subject: [v2 0/2] drm/i915/display: Implement Display Wa_16030862157
Date: Wed, 15 Jul 2026 16:11:17 +0530 [thread overview]
Message-ID: <20260715104119.4128662-1-uma.shankar@intel.com> (raw)
Interpret 0xF populated-channel count as 16. For 16-channel
configuration, BIOS programs 1111b. A programmed value of 1111b
must be interpreted as 16 channels for memory bandwidth calculations.
This series implements the workaround in driver.
Uma Shankar (2):
drm/i915/display: Add Wa_16030862157 to the display workaround list
drm/i915/dram: Interpret 0xF populated-channel count as 16
drivers/gpu/drm/i915/display/intel_bw.c | 20 ++++++++++++++++---
.../gpu/drm/i915/display/intel_display_wa.c | 2 ++
.../gpu/drm/i915/display/intel_display_wa.h | 1 +
drivers/gpu/drm/i915/display/intel_dram.c | 12 +++++++++++
4 files changed, 32 insertions(+), 3 deletions(-)
--
2.50.1
next reply other threads:[~2026-07-15 10:22 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 10:41 Uma Shankar [this message]
2026-07-15 10:29 ` ✓ CI.KUnit: success for drm/i915/display: Implement Display Wa_16030862157 Patchwork
2026-07-15 10:41 ` [v2 1/2] drm/i915/display: Add Wa_16030862157 to the display workaround list Uma Shankar
2026-07-15 10:41 ` [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16 Uma Shankar
2026-07-15 12:30 ` Govindapillai, Vinod
2026-07-15 13:27 ` Shankar, Uma
2026-07-15 11:05 ` ✓ Xe.CI.BAT: success for drm/i915/display: Implement Display Wa_16030862157 Patchwork
2026-07-15 11:19 ` ✓ i915.CI.BAT: " Patchwork
2026-07-15 11:23 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-15 12:12 ` ✓ i915.CI.Full: " Patchwork
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