From: Chinmay Rath <rathc@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, npiggin@gmail.com,
harshpb@linux.ibm.com, tommusta@gmail.com
Cc: richard.henderson@linaro.org, milesg@linux.ibm.com,
shivangu@linux.ibm.com, Chinmay Rath <rathc@linux.ibm.com>
Subject: [PATCH 2/7] target/ppc: Use PPC2_ISA207 instead of PPC2_BCTAR_ISA207
Date: Wed, 15 Jul 2026 18:26:29 +0530 [thread overview]
Message-ID: <20260715125634.2107320-3-rathc@linux.ibm.com> (raw)
In-Reply-To: <20260715125634.2107320-1-rathc@linux.ibm.com>
PPC2_BCTAR_ISA207 is only ever set in the CPUPPCState's insns_flags2
alongside PPC2_ISA207. Checks made by PPC2_BCTAR_ISA207 could be
replaced with PPC2_ISA207, hence rendering is useless and apt for
removal. This patch does the same.
Signed-off-by: Chinmay Rath <rathc@linux.ibm.com>
---
linux-user/ppc/elfload.c | 7 +++----
target/ppc/cpu.h | 4 +---
target/ppc/cpu_init.c | 2 +-
target/ppc/cpu_init.h | 2 +-
4 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/linux-user/ppc/elfload.c b/linux-user/ppc/elfload.c
index 0d54da9803..5c6065e08a 100644
--- a/linux-user/ppc/elfload.c
+++ b/linux-user/ppc/elfload.c
@@ -116,10 +116,9 @@ abi_ulong get_elf_hwcap2(CPUState *cs)
do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
- GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
- GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
- PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
- QEMU_PPC_FEATURE2_VEC_CRYPTO);
+ GET_FEATURE2((PPC2_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
+ PPC2_ISA207S), (QEMU_PPC_FEATURE2_ARCH_2_07 |
+ QEMU_PPC_FEATURE2_VEC_CRYPTO | QEMU_PPC_FEATURE2_HAS_TAR));
GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 91ef34cb21..df1e943d8d 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2577,8 +2577,6 @@ enum {
PPC2_FP_CVT_ISA206 = 0x0000000000000400ULL,
/* ISA 2.06B floating point test instructions */
PPC2_FP_TST_ISA206 = 0x0000000000000800ULL,
- /* ISA 2.07 bctar instruction */
- PPC2_BCTAR_ISA207 = 0x0000000000001000ULL,
/* ISA 2.07 load/store quadword */
PPC2_LSQ_ISA207 = 0x0000000000002000ULL,
/* ISA 2.07 Altivec */
@@ -2610,7 +2608,7 @@ enum {
PPC2_ISA205 | PPC2_ISA207 | PPC2_PERM_ISA206 | \
PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \
PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \
- PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \
+ PPC2_LSQ_ISA207 | \
PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \
PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \
PPC2_ISA300 | PPC2_ISA310 | PPC2_MEM_LWSYNC | \
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index de33ac3a88..be8b3c447d 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -6349,7 +6349,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, const void *data)
pcc->insns_flags2 = PPC2_VSX | PPC2_ISA207 | PPC2_DFP | PPC2_DBRX |
PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
- PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
+ PPC2_FP_TST_ISA206 |
PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 |
PPC2_TM | PPC2_PM_ISA206 | PPC2_MEM_LWSYNC |
diff --git a/target/ppc/cpu_init.h b/target/ppc/cpu_init.h
index 1c41c0d349..7dd587908e 100644
--- a/target/ppc/cpu_init.h
+++ b/target/ppc/cpu_init.h
@@ -17,7 +17,7 @@
#define PPC_INSNS_FLAGS2_POWER_COMMON \
(PPC2_VSX | PPC2_ISA207 | PPC2_DFP | PPC2_DBRX | \
PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \
- PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | \
+ PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \
PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | \
PPC2_ISA207S | PPC2_FP_CVT_S64 | PPC2_ISA300 | PPC2_PRCNTL | \
PPC2_MEM_LWSYNC | PPC2_BCDA_ISA206)
--
2.53.0
next prev parent reply other threads:[~2026-07-15 12:58 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 12:56 [PATCH 0/7] target/ppc: PPC ISA 2.07 flag cleanup and updates Chinmay Rath
2026-07-15 12:56 ` [PATCH 1/7] target/ppc: Replace PPC2_VSX207 flag with PPC2_ISA207 Chinmay Rath
2026-07-15 12:56 ` Chinmay Rath [this message]
2026-07-15 12:56 ` [PATCH 3/7] target/ppc: Use PPC2_ISA207 instead of PPC2_LSQ_ISA207 Chinmay Rath
2026-07-15 12:56 ` [PATCH 4/7] target/ppc: Use PPC2_ISA207 instead of PPC2_ALTIVEC_207 Chinmay Rath
2026-07-15 12:56 ` [PATCH 5/7] target/ppc: Use PPC2_ISA207 instead of PPC2_ISA207S Chinmay Rath
2026-07-15 12:56 ` [PATCH 6/7] target/ppc: Reorder PPC2 flags Chinmay Rath
2026-07-15 14:41 ` Shivang Upadhyay
2026-07-15 12:56 ` [PATCH 7/7] target/ppc: Add ICBT support for ISA version 2.07 Chinmay Rath
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