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Wed, 15 Jul 2026 08:44:42 -0500 From: Wayne Lin To: CC: Harry Wentland , Leo Li , Aurabindo Pillai , Roman Li , Wayne Lin , Tom Chung , "Fangzhi Zuo" , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , James Lin , Chenyu Chen , Austin Zheng , Wayne Lin Subject: [PATCH 02/70] drm/amd/display: Add Writeback Watermarks and Latency Fields Date: Wed, 15 Jul 2026 21:37:12 +0800 Message-ID: <20260715134432.1975118-3-Wayne.Lin@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260715134432.1975118-1-Wayne.Lin@amd.com> References: <20260715134432.1975118-1-Wayne.Lin@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001F1:EE_|MW4PR12MB7261:EE_ X-MS-Office365-Filtering-Correlation-Id: 53471a5a-c8c2-4a53-8b9a-08dee2773ef7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|23010399003|376014|1800799024|30052699003|82310400026|36860700016|10067099003|56012099006|11063799006|18002099003|22082099003; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: V452IOcoFcUU5WwhFOszBc3W9iJPS/5ShweJxRE7HJBX4s3qDRz9hwCxfjvBb79CTOMiNwBs/Ai/ZY5I4i9lduQp0RRt8OZiVmRqDNqvlkyBDUHl9eDbjsAt2wM0iB916+FB2WBB08QPABO9qojhGfNCb+9Uk9F+3safuhC72Th/dHdEPt0zJ+GrbNfUVlL6+SDLDFuXynSIgClreZ5BOaBnvhoLcnxTcQbU9YZQ03deaofG6KjCJsD+FWre+m3oS88fcmBZ1Pc05UWFcdjVdUs4wMN6rE0S0k7RpDcUQJsNeqM+TGB2QQtWR4aiVN6GyEuiuZupA0dxEySnuu3zYm3xBXKFF92CUoBrlmSHIKLBxaLTw/DJOrlb3sURYNllKg4gapD5JgFvi5c9aJPZZyg3K7RSjvYO0xhVM0AJ1dOm8hYlPkJbkceyvMps7cdy X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jul 2026 13:44:51.7632 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 53471a5a-c8c2-4a53-8b9a-08dee2773ef7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001F1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7261 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Austin Zheng Add fields that can used for writeback watermarks and latency margin Signed-off-by: Austin Zheng Reviewed-by: Wayne Lin --- .../gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h | 1 + .../dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 3 +++ .../dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h | 2 ++ 3 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h index 8d7960a340c2..cdfb5cd09edb 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h @@ -457,6 +457,7 @@ struct dml2_display_cfg_programming { double fclk_pstate_change_us; double usr_retraining_us; double temp_read_or_ppt_watermark_us; + double writeback_temp_read_or_ppt_watermark_us; } watermarks; struct { diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c index 51a66e1be7a1..b667fc9ad75f 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c @@ -317,6 +317,7 @@ dml_get_var_func(meta_trip_memory_us, double, mode_lib->mp.MetaTripToMemory); dml_get_var_func(wm_fclk_change, double, mode_lib->mp.Watermark.FCLKChangeWatermark); dml_get_var_func(wm_usr_retraining, double, mode_lib->mp.Watermark.USRRetrainingWatermark); dml_get_var_func(wm_temp_read_or_ppt, double, mode_lib->mp.Watermark.temp_read_or_ppt_watermark_us); +dml_get_var_func(wm_writeback_temp_read_or_ppt, double, mode_lib->mp.Watermark.writeback_temp_read_or_ppt_watermark_us); dml_get_var_func(wm_dram_clock_change, double, mode_lib->mp.Watermark.DRAMClockChangeWatermark); dml_get_var_func(fraction_of_urgent_bandwidth, double, mode_lib->mp.FractionOfUrgentBandwidth); dml_get_var_func(fraction_of_urgent_bandwidth_imm_flip, double, mode_lib->mp.FractionOfUrgentBandwidthImmediateFlip); @@ -13230,6 +13231,8 @@ void dml2_core_calcs_get_informative(const struct dml2_core_internal_display_mod out->informative.watermarks.fclk_pstate_change_us = dml_get_wm_fclk_change(mode_lib); out->informative.watermarks.usr_retraining_us = dml_get_wm_usr_retraining(mode_lib); out->informative.watermarks.temp_read_or_ppt_watermark_us = dml_get_wm_temp_read_or_ppt(mode_lib); + out->informative.watermarks.writeback_temp_read_or_ppt_watermark_us = dml_get_wm_writeback_temp_read_or_ppt(mode_lib); + out->informative.mall.total_surface_size_in_mall_bytes = 0; out->informative.dpp.total_num_dpps_required = 0; diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h index e9f970794488..131cec64aa48 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h @@ -212,6 +212,7 @@ struct dml2_core_internal_watermarks { double Z8StutterEnterPlusExitWatermark; double USRRetrainingWatermark; double temp_read_or_ppt_watermark_us; + double writeback_temp_read_or_ppt_watermark_us; }; struct dml2_core_internal_mode_support_info { @@ -1269,6 +1270,7 @@ struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_local double FullDETBufferingTimeC; double WritebackDRAMClockChangeLatencyMargin; double WritebackFCLKChangeLatencyMargin; + double WritebackTempReadOrPptLatencyMargin; double WritebackLatencyHiding; unsigned int TotalActiveWriteback; -- 2.43.0