Re: [PATCH v3 7/8] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation

[Jason Gunthorpe <jgg@nvidia.com>]

On Tue, Jul 14, 2026 at 04:09:21PM -0700, Nicolin Chen wrote:
> On Tue, Jul 14, 2026 at 03:46:07PM -0300, Jason Gunthorpe wrote:
> > +static unsigned int arm_smmu_compute_ttl(u8 leaf_bitmap, u8 table_bitmap,
> > +	} else {
> > +		/* Both bitmaps zero is not allowed */
> > +		return 0;
> > +	}
> 
> "not allowed" reads like we need a WARN_ON?

Yes

> 
> > +static u8 arm_smmu_tlbi_calc_stride(struct arm_smmu_tlbi *tlbi)
> > +{
> > +	u8 combined = tlbi->table_levels_bitmap | tlbi->leaf_levels_bitmap;
> > +	u8 tg_szlg2 = tlbi->tgsz_lg2;
> > +
> > +	if (!combined)
> > +		return U8_MAX;
> 
> As the code checks "combined", ...

This should be a WARN_ON too

> > +	 * If leaf_levels_bitmap is 0 then this is a walk cache only
> > +	 * invalidation. If table_levels_bitmap is 0 then this is a leaf only
> > +	 * invalidation.
> 
> ..., how about listing all combinations in this kdocs:
>        * The pair (table, leaf) below selects the invalidation scope:
>        *   table!=0, leaf==0 : walk cache only
>        *   table==0, leaf!=0 : leaves only
>        *   table!=0, leaf!=0 : walk cache + leaves
>        *   table==0, leaf==0 : a full invalidation
> ?

I did add this table below the above comment in the header

> Then, arm_smmu_compute_ttl() would read slightly better.

Yeah it is a bit tighter

Thanks,
Jason