From: James Lin <PingLei.Lin@amd.com>
To: <igt-dev@lists.freedesktop.org>
Cc: <alex.hung@amd.com>, <sunpeng.li@amd.com>,
<chiahsuan.chung@amd.com>, <Pinglei.lin@amd.com>,
James Lin <PingLei.Lin@amd.com>
Subject: [PATCH i-g-t] tests/kms_plane_alpha_blend: Skip 7efc alpha-swap CRC check on AMD at >8bpc/DSC
Date: Thu, 16 Jul 2026 14:35:59 +0800 [thread overview]
Message-ID: <20260716063619.3344-1-PingLei.Lin@amd.com> (raw)
[Why]
alpha-7efc and coverage-7efc assert that swapping the plane global alpha
(the KMS "alpha" property) with the per-pixel fb alpha (0x7e <-> 0xfc) yields
a bit-identical pipe CRC. That identity only holds when the whole blend
datapath collapses to exact 8-bit arithmetic. On AMD DCN the alpha/gain
values are 8-bit, but the blend is carried at higher internal precision and
only quantized down to the output bpc at the very end. A swap that is exact
in idealized 8-bit math can therefore leave a sub-LSB residue: at 8 bpc the
output quantization discards it and the CRCs match, but at >8 bpc, or when the
stream is DSC-compressed (carried at its native >8 bpc), the residue survives
and the CRCs differ. The strict compare then turns a legitimate precision
artifact into a test failure - observed as a CRC mismatch on an eDP link
brought up with DSC, while the same test passes on an 8-bit non-DSC link.
[How]
Add skip_if_alpha_swap_not_exact() and call it at the start of alpha_7efc and
coverage_7efc. It is a no-op on non-AMD devices, so every other driver keeps
the strict check unchanged. On amdgpu it reads the CRTC's current bpc and the
connector's DSC status, and skips only when bpc > 8 or DSC is active - the
conditions under which the alpha swap is legitimately not bit-exact. 8 bpc AMD
configurations still run the strict compare, preserving the regression
coverage the test was written for. Track the output in data_t so the DSC state
of the current connector can be queried.
Signed-off-by: James Lin <PingLei.Lin@amd.com>
---
tests/kms_plane_alpha_blend.c | 44 +++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/tests/kms_plane_alpha_blend.c b/tests/kms_plane_alpha_blend.c
index 3a2649833..e040d5bec 100644
--- a/tests/kms_plane_alpha_blend.c
+++ b/tests/kms_plane_alpha_blend.c
@@ -33,6 +33,7 @@
*/
#include "igt.h"
+#include "igt_amd.h"
/**
* SUBTEST: alpha-%s
@@ -77,6 +78,7 @@ typedef struct {
struct igt_fb xrgb_fb, argb_fb_0, argb_fb_cov_0, argb_fb_7e, argb_fb_cov_7e, argb_fb_fc, argb_fb_cov_fc, argb_fb_100, black_fb, gray_fb;
igt_crc_t ref_crc;
igt_pipe_crc_t *pipe_crc;
+ igt_output_t *output;
} data_t;
static bool in_simulation;
@@ -442,11 +444,49 @@ static void constant_alpha_max(data_t *data, igt_crtc_t *crtc,
igt_plane_set_fb(plane, NULL);
}
+/*
+ * The 7e/fc subtests (alpha-7efc, coverage-7efc) assert that swapping the
+ * plane global alpha with the per-pixel fb alpha (0x7e <-> 0xfc) yields a
+ * bit-identical pipe CRC. That identity only holds when the whole blend
+ * datapath collapses to exact 8-bit arithmetic.
+ *
+ * On AMD DCN the alpha/gain values are 8-bit, but the blend itself is carried
+ * at higher internal precision and only quantized down to the output bpc at
+ * the very end, so the swap can leave a sub-LSB residue. At 8 bpc the output
+ * quantization discards it and the two CRCs match; at >8 bpc, or when the
+ * stream is DSC-compressed (carried at its native >8 bpc), the residue is
+ * retained and the CRCs differ. This matches observation: the same test
+ * PASSes on an 8 bpc eDP link without DSC and FAILs on an eDP link brought
+ * up with DSC.
+ *
+ * So keep the strict bit-exact check everywhere except AMD at >8 bpc or with
+ * DSC active, where the swap is legitimately not bit-exact.
+ */
+static void skip_if_alpha_swap_not_exact(data_t *data, igt_crtc_t *crtc)
+{
+ unsigned int bpc;
+ bool dsc;
+
+ if (!is_amdgpu_device(data->gfx_fd))
+ return;
+
+ bpc = igt_get_crtc_current_bpc(crtc);
+ dsc = data->output &&
+ is_dp_dsc_supported(data->gfx_fd, data->output->name) &&
+ igt_amd_read_dsc_clock_status(data->gfx_fd, data->output->name) > 0;
+
+ igt_skip_on_f(bpc > 8 || dsc,
+ "plane-alpha/fb-alpha swap is not bit-exact on AMD DCN "
+ "at >8bpc/DSC (bpc=%u, dsc=%d)\n", bpc, dsc);
+}
+
static void alpha_7efc(data_t *data, igt_crtc_t *crtc, igt_plane_t *plane)
{
igt_display_t *display = &data->display;
igt_crc_t ref_crc = {}, crc = {};
+ skip_if_alpha_swap_not_exact(data, crtc);
+
if (plane->type != DRM_PLANE_TYPE_PRIMARY)
igt_plane_set_fb(igt_crtc_get_plane_type(crtc, DRM_PLANE_TYPE_PRIMARY),
&data->gray_fb);
@@ -475,6 +515,8 @@ static void coverage_7efc(data_t *data, igt_crtc_t *crtc, igt_plane_t *plane)
igt_display_t *display = &data->display;
igt_crc_t ref_crc = {}, crc = {};
+ skip_if_alpha_swap_not_exact(data, crtc);
+
igt_require(igt_plane_try_prop_enum(plane, IGT_PLANE_PIXEL_BLEND_MODE, "Coverage"));
igt_display_commit2(display, COMMIT_ATOMIC);
igt_pipe_crc_start(data->pipe_crc);
@@ -539,6 +581,8 @@ static void run_test_on_crtc_planes(data_t *data, igt_crtc_t *crtc,
int first_plane = -1;
int last_plane = -1;
+ data->output = output;
+
for_each_plane_on_crtc(crtc, plane) {
if (!igt_plane_has_prop(plane, IGT_PLANE_ALPHA))
continue;
--
2.43.0
next reply other threads:[~2026-07-16 6:33 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-16 6:35 James Lin [this message]
2026-07-16 7:19 ` ✓ Xe.CI.BAT: success for tests/kms_plane_alpha_blend: Skip 7efc alpha-swap CRC check on AMD at >8bpc/DSC Patchwork
2026-07-16 7:32 ` ✓ i915.CI.BAT: " Patchwork
2026-07-16 10:16 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-07-16 10:54 ` ✓ i915.CI.Full: success " Patchwork
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