From: Rosen Penev <rosenp@gmail.com>
To: dmaengine@vger.kernel.org
Cc: Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
linux-kernel@vger.kernel.org (open list)
Subject: [PATCHv2 1/4] dma: fsl_raid: convert descriptor stores to big-endian
Date: Thu, 16 Jul 2026 13:29:46 -0700 [thread overview]
Message-ID: <20260716202949.677290-2-rosenp@gmail.com> (raw)
In-Reply-To: <20260716202949.677290-1-rosenp@gmail.com>
The descriptor structs (fsl_re_cmpnd_frame / fsl_re_hw_desc) are
in-memory but their fields are __be32, because the structures are handed
to the device as big-endian. The driver stored CPU-endian u32 values
into them directly, which is both wrong (the engine would see
byte-swapped lengths/addresses) and flagged by sparse as a base-type
mismatch.
Wrap those stores in cpu_to_be32() so the values are little->big
converted.
Reported-by: kernel test robot <lkp@intel.com>
Fixes: https://lore.kernel.org/oe-kbuild-all/202008111749.yy85rFMD%25lkp@intel.com/
Assisted-by: opencode:hy3-free
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
drivers/dma/fsl_raid.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/dma/fsl_raid.c b/drivers/dma/fsl_raid.c
index 99945845d8b5..2778d07a05e8 100644
--- a/drivers/dma/fsl_raid.c
+++ b/drivers/dma/fsl_raid.c
@@ -242,9 +242,9 @@ static void fill_cfd_frame(struct fsl_re_cmpnd_frame *cf, u8 index,
u32 efrl = length & FSL_RE_CF_LENGTH_MASK;
efrl |= final << FSL_RE_CF_FINAL_SHIFT;
- cf[index].efrl32 = efrl;
- cf[index].addr_high = upper_32_bits(addr);
- cf[index].addr_low = lower_32_bits(addr);
+ cf[index].efrl32 = cpu_to_be32(efrl);
+ cf[index].addr_high = cpu_to_be32(upper_32_bits(addr));
+ cf[index].addr_low = cpu_to_be32(lower_32_bits(addr));
}
static struct fsl_re_desc *fsl_re_init_desc(struct fsl_re_chan *re_chan,
@@ -256,9 +256,10 @@ static struct fsl_re_desc *fsl_re_init_desc(struct fsl_re_chan *re_chan,
dma_async_tx_descriptor_init(&desc->async_tx, &re_chan->chan);
INIT_LIST_HEAD(&desc->node);
- desc->hwdesc.fmt32 = FSL_RE_FRAME_FORMAT << FSL_RE_HWDESC_FMT_SHIFT;
- desc->hwdesc.lbea32 = upper_32_bits(paddr);
- desc->hwdesc.addr_low = lower_32_bits(paddr);
+ desc->hwdesc.fmt32 = cpu_to_be32(FSL_RE_FRAME_FORMAT <<
+ FSL_RE_HWDESC_FMT_SHIFT);
+ desc->hwdesc.lbea32 = cpu_to_be32(upper_32_bits(paddr));
+ desc->hwdesc.addr_low = cpu_to_be32(lower_32_bits(paddr));
desc->cf_addr = cf;
desc->cf_paddr = paddr;
--
2.55.0
next prev parent reply other threads:[~2026-07-16 20:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-16 20:29 [PATCHv2 0/4] dma: fsl_raid: fix sparse warnings and simplify probing Rosen Penev
2026-07-16 20:29 ` Rosen Penev [this message]
2026-07-16 20:44 ` [PATCHv2 1/4] dma: fsl_raid: convert descriptor stores to big-endian sashiko-bot
2026-07-16 20:49 ` Frank Li
2026-07-16 20:29 ` [PATCHv2 2/4] dma: fsl_raid: set final bit via fill_cfd_frame() argument Rosen Penev
2026-07-16 20:47 ` sashiko-bot
2026-07-16 20:57 ` Frank Li
2026-07-16 20:29 ` [PATCHv2 3/4] dma: fsl_raid: keep MMIO bases as void __iomem and cast at access Rosen Penev
2026-07-16 20:44 ` sashiko-bot
2026-07-16 21:02 ` Frank Li
2026-07-16 20:29 ` [PATCHv2 4/4] dma: fsl_raid: use devm_platform_ioremap_resource Rosen Penev
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