All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: pankaj.gupta@oss.nxp.com
Cc: imx@lists.linux.dev, robh@kernel.org, conor+dt@kernel.org,
	devicetree@vger.kernel.org, Frank.Li@kernel.org
Subject: Re: [PATCH v28 6/7] arm64: dts: imx8ulp: add secure enclave node
Date: Fri, 17 Jul 2026 11:09:02 +0000	[thread overview]
Message-ID: <20260717110902.F2F661F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260717-imx-se-if-v28-6-0a9659c7e69d@nxp.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Critical] Bypass of the fw_busy circuit breaker when a signal interrupts ele_msg_rcv() at or after the timeout deadline, leading to DMA memory corruption.
- [Medium] The `hsm0` (`secure-enclave`) device tree node is missing the mandatory `memory-region` property, causing device tree schema validation to fail and the driver probe to unconditionally abort.
--

--- Patch [6]: [PATCH v28 6/7] arm64: dts: imx8ulp: add secure enclave node ---
commit 241fbc418ec78fd2d90f05f09b33f7f8fd2d525e
Author: Pankaj Gupta <pankaj.gupta@nxp.com>

arm64: dts: imx8ulp: add secure enclave node
    
Add support for NXP secure enclave called EdgeLock Enclave firmware (se-fw)
for imx8ulp-evk.
    
Add label sram0 for sram@2201f000 and add secure-enclave node

> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index c6d1bb9edf388..182f1444b6434 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
[ ... ]
> @@ -185,6 +185,13 @@ scmi_sensor: protocol@15 {
>  				#thermal-sensor-cells = <1>;
>  			};
>  		};
> +
> +		hsm0: secure-enclave {
> +			compatible = "fsl,imx8ulp-se-ele-hsm";
> +			mbox-names = "tx", "rx";
> +			mboxes = <&s4muap 0 0>, <&s4muap 1 0>;
> +			sram = <&sram0>;
> +		};

[Severity: Medium]
Does this node need a memory-region property to probe successfully?

Looking at se_if_probe() in drivers/firmware/imx/se_ctrl.c, when the
compatible string has reserved_dma_ranges set to true (as this one does),
it calls of_reserved_mem_device_init().

If the memory-region property is missing, that function returns -ENODEV,
which the driver converts into a probe error:

	if (if_node->reserved_dma_ranges) {
		ret = of_reserved_mem_device_init(dev);
		if (ret)
			return dev_err_probe(dev, ret,
					    "Failed to init reserved memory region.");
	}

Will this cause the secure enclave device to unconditionally fail
initialization out-of-the-box?

[Severity: Critical]
Is it possible for the driver's firmware busy circuit breaker to be bypassed
when communicating with this device?

Looking at ele_msg_rcv() in drivers/firmware/imx/ele_common.c, if a signal
interrupts wait_for_completion_interruptible_timeout() at or after the
timeout deadline, an early break bypasses the circuit breaker:

		if (is_rsp_wait_with_timeout) {
			if (time_after_eq(jiffies, deadline_jiffies)) {
				ret = -ETIMEDOUT;
				break;
			}
			remaining_jiffies = deadline_jiffies - jiffies;
		}

Because this breaks early, the loop skips the call to se_mark_fw_busy().

Later, in se_dev_ctx_shared_mem_cleanup() in drivers/firmware/imx/se_ctrl.c,
since the fw_busy flag wasn't set, the DMA memory allocator resets the buffer
position to 0:

	is_fw_busy_dev_ctx = se_is_fw_busy_ctx(dev_ctx);

	/* ... */

	if (!is_fw_busy_dev_ctx)
		se_shared_mem_mgmt->non_secure_mem.pos = 0;

Could this allow the active firmware DMA to overwrite the memory of
subsequent requests since the firmware is still running and will DMA
to the shared buffer?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260717-imx-se-if-v28-0-0a9659c7e69d@nxp.com?part=6

  reply	other threads:[~2026-07-17 11:09 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-17 11:45 [PATCH v28 0/7] firmware: imx: driver for NXP secure-enclave pankaj.gupta
2026-07-17 11:45 ` [PATCH v28 1/7] Documentation/firmware: add imx/se to other_interfaces pankaj.gupta
2026-07-17 11:00   ` sashiko-bot
2026-07-17 11:45 ` [PATCH v28 2/7] dt-bindings: arm: fsl: add imx-se-fw binding doc pankaj.gupta
2026-07-17 11:45 ` [PATCH v28 3/7] firmware: imx: add driver for NXP EdgeLock Enclave pankaj.gupta
2026-07-17 11:10   ` sashiko-bot
2026-07-17 16:11     ` Frank Li
2026-07-17 11:45 ` [PATCH v28 4/7] firmware: imx: device context dedicated to priv pankaj.gupta
2026-07-17 11:13   ` sashiko-bot
2026-07-17 16:14     ` Frank Li
2026-07-17 11:45 ` [PATCH v28 5/7] firmware: drivers: imx: adds miscdev pankaj.gupta
2026-07-17 11:12   ` sashiko-bot
2026-07-17 16:26     ` Frank Li
2026-07-17 11:45 ` [PATCH v28 6/7] arm64: dts: imx8ulp: add secure enclave node pankaj.gupta
2026-07-17 11:09   ` sashiko-bot [this message]
2026-07-17 11:45 ` [PATCH v28 7/7] arm64: dts: imx8ulp-evk: add reserved memory property pankaj.gupta

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260717110902.F2F661F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=Frank.Li@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=imx@lists.linux.dev \
    --cc=pankaj.gupta@oss.nxp.com \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.