Re: [PATCH 2/2] iio: accel: mma8452: Allow open drain interrupt pin configuration

[Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>]

On Wed, 15 Jul 2026 15:01:48 +0200
Joshua Crofts <joshua.crofts1@gmail.com> wrote:

> On Wed, 15 Jul 2026 14:21:56 +0200
> Esben Haabendal <esben@geanix.com> wrote:
> 
> > > I'm not sure if this was intentional or not in the original implementation.    
> > 
> > Ah okay. I assumed it was intentional, hinting at the hierarchy of the
> > defines.
> > Should I flatten that, or is it okay to leave it as it is?
> > For what it is worth, I like the current format :)  
> 
> Up to you of course, nobody can force you to do anything :P
> 

FWIW I often ask for this style as it makes it visually much
easier to see what each set are. 
No extra spaces == register addresses
2 extra spaces == fields in registers.
4 extra spaces == values for those fields.

Naming does this to some degree but doesn't span multiple registers
or fields in the same way that a bit of indenting does.

Jonathan