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From: Mike Groves <grovesmx@gmail.com>
To: pbrobinson@gmail.com
Cc: Oleksii_Moisieiev@epam.com, andrew.goodbody@linaro.org,
	ansuelsmth@gmail.com, chenjh@rock-chips.com, duwe@lst.de,
	gabriel.fernandez@foss.st.com, heiko@sntech.de,
	ilias.apalodimas@linaro.org, jerome.forissier@linaro.org,
	joe.hershberger@ni.com, jonas@kwiboo.se,
	kever.yang@rock-chips.com, marek.vasut+renesas@mailbox.org,
	mbrugger@suse.com, me@per1cycle.org, patrice.chotard@foss.st.com,
	patrick.delaunay@foss.st.com, paul.barker.ct@bp.renesas.com,
	quentin.schulz@cherry.de, rfried.dev@gmail.com, sairon@sairon.cz,
	sjg@chromium.org, trini@konsulko.com, u-boot@lists.denx.de,
	volodymyr_babchuk@epam.com, ycliang@andestech.com,
	zhangqing@rock-chips.com
Subject: Re: [RESEND PATCH 0/4] Improve RaspBerry Pi 5 support part1: Fixes
Date: Sun, 19 Jul 2026 06:43:34 -0400	[thread overview]
Message-ID: <20260719104335.211638-1-grovesmx@gmail.com> (raw)
In-Reply-To: <CALeDE9Pwp9j4Nh-YS-ncx+HfXz4oVfabkd6-eDgQwS6JOO4ZxA@mail.gmail.com>

Hi Peter, Torsten, all,

I have not been part of this thread so far — some context: I have been running a forward-port of this same work (full set) in production for several weeks now, across four RPi 5 boards (revision e04171 / D0 stepping), as Kubernetes worker nodes booting from NVMe via a custom Talos installer overlay. This is what prompted me to start following this thread and look at contributing.

The ask is understood, and tracks with what I ran into looking at this myself - happy to help with that cleanup if useful, deferring to Oleksii/Volodymyr/Torsten on attribution for anything I did not originally author.

The three-way split makes sense to me. One thing I want to make sure I understand correctly before anyone puts more work in: when you say RP1 support is now upstream, could you point me at exactly what's landed and where (kernel tree, specific commits/series)? I want to make sure part 3 gets built against whatever the actual current reference implementation is, rather than against the static BAR-configuration approach the original RFC used - my understanding was there was disagreement about that specific point, so if there is now a settled upstream answer I want to build on that correctly rather than repeat the same discussion.

Once there is an agreed shape for this, I am glad to help test against real D0-stepping hardware - that's one gap I can concretely help close if not already tested. Happy to also help with the actual restructuring work if that's useful, or just stay out of the way if Torsten's already got it in hand - whichever is more helpful.

Mike

      reply	other threads:[~2026-07-19 13:11 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-05 16:35 [RESEND PATCH 0/4] Improve RaspBerry Pi 5 support part1: Fixes Torsten Duwe
2025-11-05 16:44 ` [RESEND PATCH 1/4] macb: wrap asm/arch/clk.h with ifndef CLK Torsten Duwe
2025-11-06 15:51   ` Matthias Brugger
2025-11-05 16:44 ` [RESEND PATCH 2/4] pci-uclass: respect ofnode_read_pci_vendev retval Torsten Duwe
2025-11-06 15:51   ` Matthias Brugger
2025-11-19 16:47   ` Torsten Duwe
2025-11-05 16:44 ` [RESEND PATCH 3/4] Fix #cells lookup in of_get_dma_range Torsten Duwe
2025-11-28 14:44   ` Peter Robinson
2025-11-05 16:44 ` [RESEND PATCH 4/4] pcie_brcmstb: use bus_base for PCI config devices Torsten Duwe
2025-11-28 14:38 ` [RESEND PATCH 0/4] Improve RaspBerry Pi 5 support part1: Fixes Peter Robinson
2026-07-19 10:43   ` Mike Groves [this message]

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