From: sashiko-bot@kernel.org
To: "Prasad Kumpatla" <prasad.kumpatla@oss.qualcomm.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 1/4] ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID
Date: Mon, 20 Jul 2026 13:16:55 +0000 [thread overview]
Message-ID: <20260720131656.4C4391F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260720130511.493295-2-prasad.kumpatla@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly added clock ID `LPASS_HW_LPR_VOTE` (104) exceeds the driver's hardcoded `Q6DSP_MAX_CLK_ID` limit, rendering it unusable and creating an out-of-bounds array write hazard.
--
--- Patch [1]: [PATCH v4 1/4] ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID ---
commit de8b22fd20a65bf92d9b09b0009733d46893c763
Author: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID
Add a new clock ID, LPASS_HW_LPR_VOTE, to represent the LPASS low-power
resource (LPR) vote through the PRM interface. Exposing this as a q6prm
clock ID allows clients to request the LPR vote using the existing
qcom,q6prm clock provider interface. Drop Q6AFE_MAX_CLK_ID from the
bindings since it is not used in-tree.
> diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> index 45850f2d43425..ce5e8589dd1a7 100644
> --- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> +++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> @@ -236,8 +236,8 @@
> #define LPASS_HW_AVTIMER_VOTE 101
> #define LPASS_HW_MACRO_VOTE 102
> #define LPASS_HW_DCODEC_VOTE 103
> +#define LPASS_HW_LPR_VOTE 104
[Severity: High]
With LPASS_HW_LPR_VOTE being set to 104, does this exceed the driver's maximum
clock limit?
Looking at sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c, Q6DSP_MAX_CLK_ID is
set to 104:
sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c:
#define Q6DSP_MAX_CLK_ID 104
This causes q6dsp_of_clk_hw_get() to reject the new clock ID:
sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c:q6dsp_of_clk_hw_get() {
...
if (idx >= Q6DSP_MAX_CLK_ID || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) {
dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr);
return ERR_PTR(-EINVAL);
}
...
}
Will this also cause an out of bounds write during probe if the ID is used?
The clock array is sized with Q6DSP_MAX_CLK_ID:
sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c:
struct q6dsp_cc {
struct device *dev;
struct q6dsp_clk *clks[Q6DSP_MAX_CLK_ID];
const struct q6dsp_clk_desc *desc;
};
If ID 104 is added to the driver's clock array in the future,
q6dsp_clock_dev_probe() will write past the end of the clks array,
overwriting the adjacent desc pointer.
>
> -#define Q6AFE_MAX_CLK_ID 104
>
> #define LPASS_CLK_ATTRIBUTE_INVALID 0x0
> #define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260720130511.493295-1-prasad.kumpatla@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-07-20 13:16 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-20 13:05 [PATCH v4 0/4] ASoC: qcom and pinctrl: add LPASS LPR voting and Hawi LPASS LPI TLMM Prasad Kumpatla
2026-07-20 13:05 ` [PATCH v4 1/4] ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID Prasad Kumpatla
2026-07-20 13:16 ` sashiko-bot [this message]
2026-07-21 6:58 ` Krzysztof Kozlowski
2026-07-21 16:19 ` Prasad Kumpatla
2026-07-20 13:05 ` [PATCH v4 2/4] ASoC: qcom: q6prm: add support for LPASS LPR resource voting Prasad Kumpatla
2026-07-20 13:05 ` [PATCH v4 3/4] dt-bindings: pinctrl: qcom,hawi-lpass-lpi-pinctrl: Add Hawi LPI pinctrl Prasad Kumpatla
2026-07-20 13:05 ` [PATCH v4 4/4] pinctrl: qcom: hawi-lpass-lpi: add Hawi LPASS LPI TLMM Prasad Kumpatla
2026-07-20 13:16 ` sashiko-bot
2026-07-20 13:42 ` [PATCH v4 0/4] ASoC: qcom and pinctrl: add LPASS LPR voting and " Bartosz Golaszewski
2026-07-20 13:54 ` Krzysztof Kozlowski
2026-07-20 16:04 ` Bartosz Golaszewski
2026-07-22 11:32 ` Prasad Kumpatla
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