From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20D594508F8; Mon, 20 Jul 2026 17:46:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.16 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784569577; cv=none; b=RarfwL5H+bM78vCWIBNOlsZg2C9s5uynG/1KB44OUVOhx/rVZ5uesMVwXOZ270+Cq2Iyba9fupj8S1/9PDiyTUqll1+112wPW+ajNhtgcW0LDenNV8FaJl//j6epWS/bozaiS1E1ZlrTVUT6XYfPgh/sYqFJ+Z9gTSWf4x5O+rI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784569577; c=relaxed/simple; bh=tio3cp9B5/Kj79xKjqBojFllG1Xx1jqzA924PcO48Ic=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rbpajoPp4XdOdSjK8ntNU0iAHpntmBe2QPVuzxa4jfQ1kazhxvF+EoLO+crj4ehEo8MF1Z8tPkOjb8z6sjV/wGpn2PGZlZnX76Bxo8TO+4zNukk4eUo8waBPcukvyUuDm8vd2HSt4EyukIPQiaNoyI/mnJmuapk63MT2zLyauuY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=RAqSvTp+; arc=none smtp.client-ip=192.198.163.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="RAqSvTp+" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1784569571; x=1816105571; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tio3cp9B5/Kj79xKjqBojFllG1Xx1jqzA924PcO48Ic=; b=RAqSvTp+dQDXc6jz270WCwHBAlyCtnsBCXI/CPviqmtBLOvJwhOAqbxv 1OZEzKGp8iL4ljgr/mkHCFqKUCqpovD4e4JOMO88cfNJOcNn0Fb2pi6vP bU6vNmEG8Ufzou1lz87KN1RpSbPJApSHyEjLwsRrB3agn5cwW2c/NbwVw xar844oOwnEvbETCp76xZOSYEmwdPmT7BNB32yqhB5R+WyEayTQxpOfbm i0iyc0z0yehVCBsL8TluzTPQUBteplI0Onf0CX16ksTaqqoWkyfr9A9zX gNVCf3NaVBvqkSJemoplBTZCB3gBdWIm/lMsubMyEwfJh5GK1HVnYTNLv w==; X-CSE-ConnectionGUID: G+8Jk2X0RkStf0QoyL6c7g== X-CSE-MsgGUID: z2d/qWFcTc6MOcC8irft9A== X-IronPort-AV: E=McAfee;i="6800,10657,11852"; a="72691646" X-IronPort-AV: E=Sophos;i="6.25,175,1779174000"; d="scan'208";a="72691646" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2026 10:46:00 -0700 X-CSE-ConnectionGUID: 7oN8tR5gRzakOi/Tql/RGg== X-CSE-MsgGUID: tph4NU2QTo2UdtCi25V0uA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,175,1779174000"; d="scan'208";a="257575347" Received: from chang-linux-3.sc.intel.com (HELO chang-linux-3) ([172.25.66.174]) by orviesa007.jf.intel.com with ESMTP; 20 Jul 2026 10:46:00 -0700 From: "Chang S. Bae" To: pbonzini@redhat.com, seanjc@google.com Cc: kvm@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org, chang.seok.bae@intel.com Subject: [PATCH v5 04/20] KVM: VMX: Refactor VMX instruction information access Date: Mon, 20 Jul 2026 17:19:33 +0000 Message-ID: <20260720171949.498680-5-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260720171949.498680-1-chang.seok.bae@intel.com> References: <20260720171949.498680-1-chang.seok.bae@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce a helper that returns the instruction information as a 64-bit value and adjust existing sites to prepare for a wider field. The VMX instruction information field is currently 32 bits. Future extensions may expand this field to support extended register IDs, requiring a wider width. The change provides a single access point for the transition. No functional change intended. Signed-off-by: Chang S. Bae --- V4 -> V5: Convert vmx_get_msr_imm_reg() and keep `u32 type` in handle_invept() --- arch/x86/kvm/vmx/nested.c | 23 ++++++++++++----------- arch/x86/kvm/vmx/nested.h | 2 +- arch/x86/kvm/vmx/vmx.c | 6 +++--- arch/x86/kvm/vmx/vmx.h | 10 ++++++++-- 4 files changed, 24 insertions(+), 17 deletions(-) diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index 0635e92471c8..92b530baa0ee 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -5234,7 +5234,7 @@ static void nested_vmx_triple_fault(struct kvm_vcpu *vcpu) * #UD, #GP, or #SS. */ int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification, - u32 vmx_instruction_info, bool wr, int len, gva_t *ret) + u64 vmx_instruction_info, bool wr, int len, gva_t *ret) { gva_t off; bool exn; @@ -5366,7 +5366,7 @@ static int nested_vmx_get_vmptr(struct kvm_vcpu *vcpu, gpa_t *vmpointer, int r; if (get_vmx_mem_address(vcpu, vmx_get_exit_qual(vcpu), - vmcs_read32(VMX_INSTRUCTION_INFO), false, + vmx_get_instr_info(), false, sizeof(*vmpointer), &gva)) { *ret = 1; return -EINVAL; @@ -5651,7 +5651,7 @@ static int handle_vmread(struct kvm_vcpu *vcpu) struct vmcs12 *vmcs12 = is_guest_mode(vcpu) ? get_shadow_vmcs12(vcpu) : get_vmcs12(vcpu); unsigned long exit_qualification = vmx_get_exit_qual(vcpu); - u32 instr_info = vmcs_read32(VMX_INSTRUCTION_INFO); + u64 instr_info = vmx_get_instr_info(); struct vcpu_vmx *vmx = to_vmx(vcpu); struct x86_exception e; unsigned long field; @@ -5757,7 +5757,7 @@ static int handle_vmwrite(struct kvm_vcpu *vcpu) struct vmcs12 *vmcs12 = is_guest_mode(vcpu) ? get_shadow_vmcs12(vcpu) : get_vmcs12(vcpu); unsigned long exit_qualification = vmx_get_exit_qual(vcpu); - u32 instr_info = vmcs_read32(VMX_INSTRUCTION_INFO); + u64 instr_info = vmx_get_instr_info(); struct vcpu_vmx *vmx = to_vmx(vcpu); struct x86_exception e; unsigned long field; @@ -5946,7 +5946,7 @@ static int handle_vmptrld(struct kvm_vcpu *vcpu) static int handle_vmptrst(struct kvm_vcpu *vcpu) { unsigned long exit_qual = vmx_get_exit_qual(vcpu); - u32 instr_info = vmcs_read32(VMX_INSTRUCTION_INFO); + u64 instr_info = vmx_get_instr_info(); gpa_t current_vmptr = to_vmx(vcpu)->nested.current_vmptr; struct x86_exception e; gva_t gva; @@ -5974,8 +5974,8 @@ static int handle_vmptrst(struct kvm_vcpu *vcpu) static int handle_invept(struct kvm_vcpu *vcpu) { struct vcpu_vmx *vmx = to_vmx(vcpu); - u32 vmx_instruction_info, types; unsigned long type, roots_to_free; + u64 vmx_instruction_info; struct kvm_mmu *mmu; gva_t gva; struct x86_exception e; @@ -5983,6 +5983,7 @@ static int handle_invept(struct kvm_vcpu *vcpu) u64 eptp, gpa; } operand; int i, r, gpr_index; + u32 types; if (!(vmx->nested.msrs.secondary_ctls_high & SECONDARY_EXEC_ENABLE_EPT) || @@ -5994,7 +5995,7 @@ static int handle_invept(struct kvm_vcpu *vcpu) if (!nested_vmx_check_permission(vcpu)) return 1; - vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); + vmx_instruction_info = vmx_get_instr_info(); gpr_index = vmx_get_instr_info_reg2(vmx_instruction_info); type = kvm_register_read(vcpu, gpr_index); @@ -6054,7 +6055,7 @@ static int handle_invept(struct kvm_vcpu *vcpu) static int handle_invvpid(struct kvm_vcpu *vcpu) { struct vcpu_vmx *vmx = to_vmx(vcpu); - u32 vmx_instruction_info; + u64 vmx_instruction_info; unsigned long type, types; gva_t gva; struct x86_exception e; @@ -6075,7 +6076,7 @@ static int handle_invvpid(struct kvm_vcpu *vcpu) if (!nested_vmx_check_permission(vcpu)) return 1; - vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); + vmx_instruction_info = vmx_get_instr_info(); gpr_index = vmx_get_instr_info_reg2(vmx_instruction_info); type = kvm_register_read(vcpu, gpr_index); @@ -6428,7 +6429,7 @@ static bool nested_vmx_exit_handled_encls(struct kvm_vcpu *vcpu, static bool nested_vmx_exit_handled_vmcs_access(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12, gpa_t bitmap) { - u32 vmx_instruction_info; + u64 vmx_instruction_info; unsigned long field; u8 b; @@ -6436,7 +6437,7 @@ static bool nested_vmx_exit_handled_vmcs_access(struct kvm_vcpu *vcpu, return true; /* Decode instruction info and find the field to access */ - vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); + vmx_instruction_info = vmx_get_instr_info(); field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf)); /* Out-of-range fields always cause a VM exit from L2 to L1 */ diff --git a/arch/x86/kvm/vmx/nested.h b/arch/x86/kvm/vmx/nested.h index 6d6cd5904ddf..fb4f1757cb40 100644 --- a/arch/x86/kvm/vmx/nested.h +++ b/arch/x86/kvm/vmx/nested.h @@ -51,7 +51,7 @@ void nested_sync_vmcs12_to_shadow(struct kvm_vcpu *vcpu); int vmx_set_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata); int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification, - u32 vmx_instruction_info, bool wr, int len, gva_t *ret); + u64 vmx_instruction_info, bool wr, int len, gva_t *ret); bool nested_vmx_check_io_bitmaps(struct kvm_vcpu *vcpu, unsigned int port, int size); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 1c86919d14d4..8a4b578252c2 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -6158,7 +6158,7 @@ static int handle_monitor_trap(struct kvm_vcpu *vcpu) static int handle_invpcid(struct kvm_vcpu *vcpu) { - u32 vmx_instruction_info; + u64 vmx_instruction_info; unsigned long type; gva_t gva; struct { @@ -6172,7 +6172,7 @@ static int handle_invpcid(struct kvm_vcpu *vcpu) return 1; } - vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO); + vmx_instruction_info = vmx_get_instr_info(); gpr_index = vmx_get_instr_info_reg2(vmx_instruction_info); type = kvm_register_read(vcpu, gpr_index); @@ -6323,7 +6323,7 @@ static int handle_notify(struct kvm_vcpu *vcpu) static int vmx_get_msr_imm_reg(struct kvm_vcpu *vcpu) { - return vmx_get_instr_info_reg(vmcs_read32(VMX_INSTRUCTION_INFO)); + return vmx_get_instr_info_reg(vmx_get_instr_info()); } static int handle_rdmsr_imm(struct kvm_vcpu *vcpu) diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h index de9de0d2016c..a3f58a3d90e5 100644 --- a/arch/x86/kvm/vmx/vmx.h +++ b/arch/x86/kvm/vmx/vmx.h @@ -702,12 +702,18 @@ static inline bool vmx_guest_state_valid(struct kvm_vcpu *vcpu) void dump_vmcs(struct kvm_vcpu *vcpu); -static inline int vmx_get_instr_info_reg(u32 vmx_instr_info) +/* A placeholder to smoothen 64-bit extension */ +static inline u64 vmx_get_instr_info(void) +{ + return vmcs_read32(VMX_INSTRUCTION_INFO); +} + +static inline int vmx_get_instr_info_reg(u64 vmx_instr_info) { return (vmx_instr_info >> 3) & 0xf; } -static inline int vmx_get_instr_info_reg2(u32 vmx_instr_info) +static inline int vmx_get_instr_info_reg2(u64 vmx_instr_info) { return (vmx_instr_info >> 28) & 0xf; } -- 2.53.0