All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: JinRui <jinrui@haiwei.tech>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v2] KVM: selftests: riscv: Add lazy V extension enablement for guests
Date: Tue, 21 Jul 2026 11:06:48 +0000	[thread overview]
Message-ID: <20260721110648.984051F000E9@smtp.kernel.org> (raw)
In-Reply-To: <C286E18DD19A86E7+20260721105736.320687-1-jinrui@haiwei.tech>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `v_available` global variable is modified by the host but never synchronized to the guest, causing the lazy V extension enablement to fail.
--

--- Patch [1]: [PATCH v2] KVM: selftests: riscv: Add lazy V extension enablement for guests ---
commit cbe1d2bca6a87eaa2ec0da02cdab16afeceb5c77
Author: jinrui <jinrui@haiwei.tech>

KVM: selftests: riscv: Add lazy V extension enablement for guests

This commit introduces lazy V extension enablement in RISC-V KVM selftests.
It adds a global variable to track V extension availability and updates the
guest exception handler to re-execute vector instructions when trapped.

> diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c
> --- a/tools/testing/selftests/kvm/lib/riscv/processor.c
> +++ b/tools/testing/selftests/kvm/lib/riscv/processor.c

[ ... ]

> @@ -348,8 +343,23 @@ struct kvm_vcpu *vm_arch_vcpu_add(struct kvm_vm *vm, u32 vcpu_id)
>  	/* Setup sscratch for guest_get_vcpuid() */
>  	vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(sscratch), vcpu_id);
>  
> -	/* Setup default exception vector of guest */
> -	vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(stvec), (unsigned long)guest_unexp_trap);
> +	/*
> +	 * Enable the V (vector) extension in KVM so that the compiler can
> +	 * safely generate vector instructions (e.g. via -O2 auto-
> +	 * vectorization). Silently ignore errors; the test will still work
> +	 * without V.
> +	 */
> +	__vcpu_set_reg(vcpu, RISCV_ISA_EXT_REG(KVM_RISCV_ISA_EXT_V), 1);
> +	v_available = __vcpu_has_isa_ext(vcpu, KVM_RISCV_ISA_EXT_V);

[Severity: Medium]
Does v_available need to be synchronized to the guest here using
sync_global_to_guest(vm, v_available)?

Because vm_arch_vcpu_add() updates this from the host context, the guest
will only see its own unsynchronized copy (which defaults to false).

> +
> +	/*
> +	 * Use the full exception vector table (which provides lazy V
> +	 * extension enablement for EXC_INST_ILLEGAL in route_exception)
> +	 * as the default exception handler. vm_init_vector_tables() is
> +	 * idempotent; tests that call it again will get a no-op.
> +	 */
> +	vm_init_vector_tables(vm);
> +	vcpu_init_vector_tables(vcpu);
>  
>  	return vcpu;
>  }

[ ... ]

> @@ -432,6 +442,33 @@ void route_exception(struct pt_regs *regs)
>  		ec = 0;
>  	}
>  
> +	/*
> +	 * Handle V (vector) extension lazy enablement before any
> +	 * registered handler. The compiler's default march may include
> +	 * V, and auto-vectorization generates vector instructions that
> +	 * trigger EXC_INST_ILLEGAL when VS (Vector Status) in sstatus
> +	 * is Off. Enable VS to Initial and re-execute the faulting
> +	 * instruction, mimicking what a real OS kernel does.
> +	 *
> +	 * This check runs before any test-registered handler, so tests
> +	 * that install their own EXC_INST_ILLEGAL handler (e.g.
> +	 * sbi_pmu_test) are not affected.
> +	 */
> +	if (!(regs->cause & CAUSE_IRQ_FLAG) && ec == EXC_INST_ILLEGAL) {
> +		/*
> +		 * If KVM supports the V extension for this Guest and VS
> +		 * (Vector Status) is Off in the saved sstatus, set it to
> +		 * Initial and sret to re-execute the faulting instruction.
> +		 * Use regs->status (saved at exception entry) rather than
> +		 * reading the live CSR to avoid a TOCTOU race with nested
> +		 * exceptions.
> +		 */
> +		if (v_available && !(regs->status & SR_VS)) {

[Severity: Medium]
Since route_exception() runs in the guest, won't v_available always evaluate
to false without a prior sync_global_to_guest() call?

Could this cause a regression where the lazy enablement check is bypassed,
leading the guest to fail when it encounters an auto-vectorized instruction?

> +			regs->status |= SR_VS_INITIAL;
> +			return;
> +		}
> +	}
> +
>  	if (handlers && handlers->exception_handlers[vector][ec])
>  		return handlers->exception_handlers[vector][ec](regs);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/C286E18DD19A86E7+20260721105736.320687-1-jinrui@haiwei.tech?part=1

  reply	other threads:[~2026-07-21 11:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-21 10:14 [PATCH] KVM: selftests: riscv: Add lazy V extension enablement for guests JinRui
2026-07-21 10:14 ` JinRui
2026-07-21 10:14 ` JinRui
2026-07-21 10:25 ` sashiko-bot
2026-07-21 10:57 ` [PATCH v2] " JinRui
2026-07-21 10:57   ` JinRui
2026-07-21 10:57   ` JinRui
2026-07-21 11:06   ` sashiko-bot [this message]
2026-07-21 11:24   ` [PATCH v3] " JinRui
2026-07-21 11:24     ` JinRui
2026-07-21 11:24     ` JinRui
2026-07-21 11:41     ` sashiko-bot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260721110648.984051F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=jinrui@haiwei.tech \
    --cc=kvm@vger.kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.