From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB0EA3B52E7; Tue, 21 Jul 2026 22:14:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784672075; cv=none; b=QUOgez7I45E+iGq9enNdSHN2rU17w206J9L4MhT74eMo4p0EcbHk63I+vqYlb5YaHLRHhRGXYO5Ym9lBIKr/vHpowQzA0mR5omzHY0ze/2ws+G/s9xWL6M1P17cxldkfRgLRsQRBT5FMkuYbu4Oxo5C2YAaZlJYXfWfeGHOPHfs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784672075; c=relaxed/simple; bh=mWCS/A/XN8HkqfDWrmESR5TVVCzlVTmCQMiP2iwXpWo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NxsStmyyzQw3RcOeP1lln1nmYnhOCAIlSxlVf9ciSS0/chCBpMhS9cMkjvx+COZVjBT649pPOtTXbAcICpJ6tQZDMe8DvlTECXEwe/3TV7AJxFWpIR2niZbpMFO9vU/vBXppJDE+ITJ6VLKHqvZ4KcbGS3uV//TtRd4Tvvkjbig= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=qTdLCI1J; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="qTdLCI1J" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D40B1F000E9; Tue, 21 Jul 2026 22:14:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1784672073; bh=n72llbF37vqc1mIe+/So6m7AWFpvop9oQSHMyh3/kpA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=qTdLCI1JHWtEXSkW2/h4Kw42sW7abNmoJDa+45/iFfH+brxkb41R6UbAIurmlD6Bn JPwrklUrjm9ZwKZBBhztetKnDeDrJhUvDhPjDiL1bqu1vFq73C97RZTb4eIuIJbzQx dPUEfIOr+QPUcw1ukX7nCH3Lz2e29v3Mrb5RsIT4= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Pengpeng Hou , Mark Brown , Sasha Levin Subject: [PATCH 5.15 486/843] spi: sh-msiof: abort transfers when reset times out Date: Tue, 21 Jul 2026 17:22:01 +0200 Message-ID: <20260721152416.961041771@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260721152405.946368001@linuxfoundation.org> References: <20260721152405.946368001@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Pengpeng Hou [ Upstream commit 6dbaa4d288432c697cea47028480481b8b29bd6a ] sh_msiof_spi_reset_regs() asserts TX/RX reset and polls until the reset bits clear, but the poll result is ignored. sh_msiof_transfer_one() can therefore continue programming a transfer after the controller did not leave reset. Return the reset poll result from the helper and abort the transfer on timeout, matching the existing transfer path's error-return style. Fixes: fedd6940682a ("spi: sh-msiof: Add reset of registers before starting transfer") Signed-off-by: Pengpeng Hou Link: https://patch.msgid.link/20260623135834.55442-1-pengpeng@iscas.ac.cn Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-sh-msiof.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index f118dff626d0b0..b63e792f296e6b 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -243,7 +243,7 @@ static irqreturn_t sh_msiof_spi_irq(int irq, void *data) return IRQ_HANDLED; } -static void sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) +static int sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) { u32 mask = SICTR_TXRST | SICTR_RXRST; u32 data; @@ -252,8 +252,8 @@ static void sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) data |= mask; sh_msiof_write(p, SICTR, data); - readl_poll_timeout_atomic(p->mapbase + SICTR, data, !(data & mask), 1, - 100); + return readl_poll_timeout_atomic(p->mapbase + SICTR, data, + !(data & mask), 1, 100); } static const u32 sh_msiof_spi_div_array[] = { @@ -927,7 +927,9 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr, int ret; /* reset registers */ - sh_msiof_spi_reset_regs(p); + ret = sh_msiof_spi_reset_regs(p); + if (ret) + return ret; /* setup clocks (clock already enabled in chipselect()) */ if (!spi_controller_is_slave(p->ctlr)) -- 2.53.0