From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 121C1265606; Tue, 21 Jul 2026 19:45:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784663135; cv=none; b=lOhEnTzSSNCqlOoTLSvboxc0mRvH8V4gH6PrgCM6g5smqZkfZWQRHj2iijAXMWLZyR+vSC7/QeF516caH0kgSghlwzC4f7mZeHdMxoQuOQ4sjTD4tzWO/PTsMYeU2cg+V+5U42g9ENdU7p2fUgsps+TOHGM6H4sgVrdhoV2jBJs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784663135; c=relaxed/simple; bh=UXXIjVARsog6yEgyNbzalAyf7gz2YM/C4lsYn2l/XTM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TREHKrE6UwzDxiUdJnsx6D+ADz7oWrPWbXWFTF+mhLv0Jn13E2dmYNL98/CxdEMxDKPnFDghr8I3oM55b3GXoDijhl6YhGNk6wFme0IZR35f0LTsSgR/bi3LZ+Ry5XGipu0OKSEgxPi8wndWoBJiWHvZQejC/y2MiXMDDmvloTc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=dWJH8F5R; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="dWJH8F5R" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76B241F000E9; Tue, 21 Jul 2026 19:45:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1784663134; bh=iGyNWvjV8NFQWQeX4u+5txKVUHKGSHI161Hl6wqZZYA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=dWJH8F5RLHvP8o7EDjmcrvCGckons5qh8KjtNynXntK0GLj/NZZQ6Hh8A3DqQsEIc y7mgoEId0QtV36aIZrGc6LwsOGrVA3HoT2VbelvKlUn/pmmBKj91UOr2DoAKEQgRTk 9/4z03MSd5+Nykl5lAJtG4goJ6Xa0a75rTH0rpfI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Pengpeng Hou , Mark Brown , Sasha Levin Subject: [PATCH 6.12 0691/1276] spi: sh-msiof: abort transfers when reset times out Date: Tue, 21 Jul 2026 17:18:54 +0200 Message-ID: <20260721152501.559666489@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260721152446.065700225@linuxfoundation.org> References: <20260721152446.065700225@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Pengpeng Hou [ Upstream commit 6dbaa4d288432c697cea47028480481b8b29bd6a ] sh_msiof_spi_reset_regs() asserts TX/RX reset and polls until the reset bits clear, but the poll result is ignored. sh_msiof_transfer_one() can therefore continue programming a transfer after the controller did not leave reset. Return the reset poll result from the helper and abort the transfer on timeout, matching the existing transfer path's error-return style. Fixes: fedd6940682a ("spi: sh-msiof: Add reset of registers before starting transfer") Signed-off-by: Pengpeng Hou Link: https://patch.msgid.link/20260623135834.55442-1-pengpeng@iscas.ac.cn Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-sh-msiof.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 1870f8c8521315..3367c3e18de87f 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -242,7 +242,7 @@ static irqreturn_t sh_msiof_spi_irq(int irq, void *data) return IRQ_HANDLED; } -static void sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) +static int sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) { u32 mask = SICTR_TXRST | SICTR_RXRST; u32 data; @@ -251,8 +251,8 @@ static void sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p) data |= mask; sh_msiof_write(p, SICTR, data); - readl_poll_timeout_atomic(p->mapbase + SICTR, data, !(data & mask), 1, - 100); + return readl_poll_timeout_atomic(p->mapbase + SICTR, data, + !(data & mask), 1, 100); } static const u32 sh_msiof_spi_div_array[] = { @@ -926,7 +926,9 @@ static int sh_msiof_transfer_one(struct spi_controller *ctlr, int ret; /* reset registers */ - sh_msiof_spi_reset_regs(p); + ret = sh_msiof_spi_reset_regs(p); + if (ret) + return ret; /* setup clocks (clock already enabled in chipselect()) */ if (!spi_controller_is_target(p->ctlr)) -- 2.53.0