From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 603D53FFFAF; Tue, 21 Jul 2026 17:45:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784655904; cv=none; b=WGB3QNrrsBRO4U31H7SB1C4PTfpDbNgzkIV063mv+EtinqGjzJqR7aE3Ffmz8ho65gpWcr5Klfr7N3xw3dLFkSLBYKN4TzznX0ayBJ7vEQ+yd8aWCLpx4IVcS28dvOz8vrZy7RBsriIVZasd1JMlCvVp+yKrD82bd1utS9ablKw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784655904; c=relaxed/simple; bh=bg0YR1KTm+SX+moeuhFTs/XL73RKbPSQ1qeFMJVO+F4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LNR+XLNe+fN04kAZblJdPPbgibS7Zq7SwRLO5PLF0MdOEbbvsJPUglHCK6a4uQSmbvOoI8g2LV7Pa5gHixskT9BgXw6Wa3v36Q46zB78ppMzqwR1CjQbWQBx49xpofmZuyjurFC+hZ2gd6Wk/iPlQW0csSQCbUfwYezw2aLku3I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=RP3m09sB; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="RP3m09sB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A78B51F000E9; Tue, 21 Jul 2026 17:45:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1784655903; bh=ErpzV8wASmu+3jOAaA4KNVDaDkl+9mqCBqq7KejhfGs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=RP3m09sBIdBDoe5xnyr8kFdCV/a8f5/s8Mtebq5pUGzBWNn/O0dtRK4trnIzUDi2H hwA7TMrJxqfXt2caaLailCgzJyQjTUZUJY84ZqiQkCVS2iScQotPcODHB2lBUXJDJD QS8AfqJKC4f3ERnzepa2nQvLByT4zJGmQIUDuOiI= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Konrad Dybcio , Kuldeep Singh , Harshal Dev , Bartosz Golaszewski , Bjorn Andersson , Sasha Levin Subject: [PATCH 6.18 0183/1611] arm64: dts: qcom: lemans: Add power-domain and iface clk for ice node Date: Tue, 21 Jul 2026 17:04:59 +0200 Message-ID: <20260721152519.041205742@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260721152514.750365251@linuxfoundation.org> References: <20260721152514.750365251@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.18-stable review patch. If anyone has any objections, please let me know. ------------------ From: Harshal Dev [ Upstream commit 04566e287b35fde9fd129db5fdf6a96e336af55c ] Qualcomm in-line crypto engine (ICE) platform driver specifies and votes for its own resources. Before accessing ICE hardware during probe, to avoid potential unclocked register access issues (when clk_ignore_unused is not passed on the kernel command line), in addition to the 'core' clock the 'iface' clock should also be turned on by the driver. This can only be done if the UFS_PHY_GDSC power domain is enabled. Specify both the UFS_PHY_GDSC power domain and the 'iface' clock in the ICE node for lemans. Fixes: 96272ba7103d4 ("arm64: dts: qcom: sa8775p: enable the inline crypto engine") Reviewed-by: Konrad Dybcio Reviewed-by: Kuldeep Singh Signed-off-by: Harshal Dev Reviewed-by: Bartosz Golaszewski Link: https://lore.kernel.org/r/20260416-qcom_ice_power_and_clk_vote-v5-4-5ccf5d7e2846@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/lemans.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi index ef20ea941aa918..68c0fe6706cb85 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -2753,7 +2753,11 @@ ice: crypto@1d88000 { compatible = "qcom,sa8775p-inline-crypto-engine", "qcom,inline-crypto-engine"; reg = <0x0 0x01d88000 0x0 0x18000>; - clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>; + clock-names = "core", + "iface"; + power-domains = <&gcc UFS_PHY_GDSC>; }; cryptobam: dma-controller@1dc4000 { -- 2.53.0