From: Bjorn Helgaas <helgaas@kernel.org>
To: Lin Mohan <linmhwork@outlook.com>,
Nirmal Patel <nirmal.patel@linux.intel.com>
Cc: Ali Alaei <ali.alaei.tabatabaei@gmail.com>,
Jonathan Derrick <jonathan.derrick@linux.dev>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Subject: Re: [PATCH v3] PCI: vmd: Handle BUS_RESTRICT_CFG value 3 for Arrow Lake-HX
Date: Tue, 21 Jul 2026 11:42:31 -0500 [thread overview]
Message-ID: <20260721164231.GA621153@bhelgaas> (raw)
In-Reply-To: <191EE983-DD30-4B14-9B63-93AA0BF750DB@outlook.com>
On Tue, Jul 21, 2026 at 12:47:07PM +0000, Lin Mohan wrote:
> Hi Bjorn,
>
> I am Lin Mohan, the reporter of
> https://bugzilla.kernel.org/show_bug.cgi?id=221137.
>
> Since commit 22b47bd49e45 ("PCI: vmd: Handle BUS_RESTRICT_CFG value 3
> for Arrow Lake-HX") has already been merged, could you please add the
> following tags in a follow-up fix?
>
> Reported-by: Lin Mohan <linmhwork@outlook.com>
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=221137
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=221136
>
> This patch fixes the same Mode 3 / Dynamic Bus Offset issue I
> reported on the 8086:09ab VMD device (Arrow Lake-S).
Thanks very much for confirming this!
I added the tags to the commit on pci/controller/vmd.
I do still question whether that commit includes sufficient support
for this Mode 3 feature, so I'm hoping Nirmal or someone else from
Intel will chime in.
next prev parent reply other threads:[~2026-07-21 16:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 12:47 [PATCH v3] PCI: vmd: Handle BUS_RESTRICT_CFG value 3 for Arrow Lake-HX Lin Mohan
2026-07-21 16:42 ` Bjorn Helgaas [this message]
-- strict thread matches above, loose matches on Subject: below --
2026-06-04 21:40 [PATCH v2] " Ali Alaei
2026-06-28 14:34 ` [PATCH v3] " Ali Alaei
2026-06-28 14:46 ` sashiko-bot
2026-07-13 17:16 ` Ali Alaei
2026-07-15 5:56 ` Manivannan Sadhasivam
2026-07-20 22:47 ` Bjorn Helgaas
2026-07-21 12:47 ` Lin Mohan
2026-07-21 12:50 ` Lin Mohan
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