Re: [PATCH v2 1/2] dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Incomplete schema validation due to omission of `qcom,x1e80100-inline-crypto-engine` in the strict hardware constraints conditional block.
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--- Patch [1]: [PATCH v2 1/2] dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support ---
commit c7cd6f7e1716e4206c0cabbb6a305f96fda3ae96
Author: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>

dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 support

Document the compatible string for inline crypto engine found
on the Qualcomm X1E80100 SoC, used by the Hamoa IoT EVK board.

> diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
> index db895c50e2d25..29c9a1ff638c5 100644
> --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
> +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
> @@ -25,6 +25,7 @@ properties:
>            - qcom,sm8550-inline-crypto-engine
>            - qcom,sm8650-inline-crypto-engine
>            - qcom,sm8750-inline-crypto-engine
> +          - qcom,x1e80100-inline-crypto-engine

[Severity: Medium]
Should the new qcom,x1e80100-inline-crypto-engine string also be added to the
allOf:if conditional block further down in this file?

Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml:
    allOf:
      - if:
          properties:
            compatible:
              contains:
                enum:
                  - qcom,eliza-inline-crypto-engine
                  - qcom,milos-inline-crypto-engine

If x1e80100 hardware shares the strict clock and power-domain requirements,
omitting it here introduces a regression in schema validation.

The dt_binding_check would silently pass device tree nodes missing a
power-domains reference or a second clock.

This could result in a synchronous external abort at runtime when the driver
attempts to read the ICE version register without the power domain enabled.

>        - const: qcom,inline-crypto-engine
>  
>    reg:

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Sashiko AI review · https://sashiko.dev/#/patchset/20260722-devtool-v2-0-d7e609ef7388@oss.qualcomm.com?part=1