Re: [PATCH RESEND 1/2] memory: mtk-smi: Add mt8189 support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The newly added OSTD array for MT8189 contains 0x0 values in the middle of port configuration lists, which will cause the initialization loop to prematurely terminate and skip remaining ports.
- [High] The `mtk_smi_larb_mt8189_ostd` array is incorrectly indexed using physical LARB IDs instead of the logical `larbid`s, leading to uninitialized (zero) configuration values being used for sparse LARBs.
--

--- Patch [1]: [PATCH RESEND 1/2] memory: mtk-smi: Add mt8189 support ---
commit a0aeb95996d513c82894f215895c9e39ee05a1de
Author: Congcong Yao <congcong.yao@mediatek.com>

memory: mtk-smi: Add mt8189 support

Add the necessary platform data and ostdl setting to enable support
for mt8189 smi.

> diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
> index aaeba8ab211e9..f2d5462af6817 100644
> --- a/drivers/memory/mtk-smi.c
> +++ b/drivers/memory/mtk-smi.c
> @@ -401,6 +401,30 @@ static const u8 mtk_smi_larb_mt8188_ostd[][SMI_LARB_PORT_NR_MAX] = {
>  	[25] = {0x01},
>  };
>  
> +static const u8 mtk_smi_larb_mt8189_ostd[][SMI_LARB_PORT_NR_MAX] = {
> +	[0] = {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,},
> +	[1] = {0x8, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x0,},
> +	[2] = {0x7, 0x7, 0x4, 0x4, 0x0, 0x0, 0x2, 0x2, 0x7, 0x7, 0x0,},

[Severity: High]
Does this explicit 0x0 value cause the initialization loop to prematurely
terminate?

During MT8189 SMI LARB initialization, mtk_smi_larb_config_port_gen2_general()
iterates over the OSTD configurations. The loop uses !!larbostd[i] as a
termination condition:

    for (i = 0; i < SMI_LARB_PORT_NR_MAX && larbostd && !!larbostd[i]; i++) {
        ...
    }

Because mtk_smi_larb_mt8189_ostd[2] explicitly specifies 0x0 for ports 4 and 5,
the loop will break at port 4, completely skipping the configuration of ports
6 through 9.

> +	[4] = {0x2F, 0x1E, 0x9, 0x1, 0x1, 0x1, 0x1, 0x2, 0x2, 0x5, 0x1, 0x17,},

[Severity: High]
Are these indices using physical LARB IDs instead of logical contiguous IDs?

The SMI device tree bindings map sparse physical LARBs to contiguous logical
IDs. The SMI driver populates larb->larbid directly from this logical ID via
the mediatek,larb-id DT property.

If this array uses physical IDs (e.g., [4], [7], [20]), then when probing a
sparse LARB like LARB 4, the driver accesses larb_gen->ostd[3] (its logical
ID), which is empty. This would lead to uninitialized zero configuration values
being used for all sparse LARBs.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260722-8189-smi-support-v1-0-b528a4fd878c@mediatek.com?part=1