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From: sashiko-bot@kernel.org
To: "Rohan Joshi" <rohan1sj@cadence.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support
Date: Wed, 22 Jul 2026 10:54:58 +0000	[thread overview]
Message-ID: <20260722105458.76F821F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260722-cdns_sdhci_cqe-support-v3-1-4412856a4488@cadence.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Missing `maxItems: 2` constraint in the `else` block allows invalid device tree configurations to pass validation.
--

--- Patch [1]: [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support ---
commit deaf7bf4553d7883c61e62fdcaba11a90405564f
Author: Rohan Joshi <rohan1sj@cadence.com>

dt-bindings: mmc: cdns,sdhci: Add CQE support

This commit adds optional Command Queuing Engine (CQE) register space to the 
Cadence SDHCI bindings. It expands the top-level reg constraints to allow up
to 3 items and adjusts the allOf conditionals for Elba and non-Elba variants.

> diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> index 6c7317d13aa6c..10bc9ac2073a6 100644
> --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
> +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml

[ ... ]

> @@ -131,13 +138,27 @@ allOf:
>      then:
>        properties:
>          reg:
> +          minItems: 2
>            items:
>              - description: Host controller registers
>              - description: Elba byte-lane enable register for writes
> +            - description: CQE (Command Queuing Engine) registers (optional)
> +        reg-names:
> +          minItems: 2
> +          items:
> +            - const: hc
> +            - const: bctl
> +            - const: cqhci
>      else:
>        properties:
>          reg:
> -          maxItems: 1
> +          items:
> +            - description: Host Controller registers
> +            - description: CQE (Command Queuing Engine) registers (optional)

[Severity: Low]
Does this else block need an explicit maxItems: 2 for reg and reg-names?

Since the top-level property now allows up to 3 items, and dtschema does
not automatically apply maxItems bounds from items lists inside
conditional blocks, could a non-Elba device tree incorrectly define 3
registers and still pass validation?

> +        reg-names:
> +          items:
> +            - const: hc
> +            - const: cqhci

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260722-cdns_sdhci_cqe-support-v3-0-4412856a4488@cadence.com?part=1

  reply	other threads:[~2026-07-22 10:54 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-22 10:48 [PATCH v3 0/2] CQE support for cadence eMMC host controller Rohan Joshi via B4 Relay
2026-07-22 10:48 ` Rohan Joshi
2026-07-22 10:48 ` [PATCH v3 1/2] dt-bindings: mmc: cdns,sdhci: Add CQE support Rohan Joshi via B4 Relay
2026-07-22 10:48   ` Rohan Joshi
2026-07-22 10:54   ` sashiko-bot [this message]
2026-07-22 16:37   ` Conor Dooley
2026-07-22 10:48 ` [PATCH v3 2/2] mmc: sdhci-cadence: add " Rohan Joshi via B4 Relay
2026-07-22 10:48   ` Rohan Joshi
2026-07-22 11:00   ` sashiko-bot

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