Re: [PATCH v9 10/17] iio: frequency: ad9910: initial driver implementation

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `adi,refclk-out-drive-strength` device tree property is silently ignored when the internal PLL is disabled.
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--- Patch [10]: [PATCH v9 10/17] iio: frequency: ad9910: initial driver implementation ---
commit 82b3fbe21cfa117c3a6f9b7b61ab5f4eb04cb69b
Author: Rodrigo Alencar <rodrigo.alencar@analog.com>

iio: frequency: ad9910: initial driver implementation

Add the core AD9910 DDS driver infrastructure with single tone mode support.
This includes SPI register access, profile management via GPIO pins, PLL/DAC
configuration from firmware properties, and single tone
frequency/phase/amplitude control through IIO attributes.

> diff --git a/drivers/iio/frequency/ad9910.c b/drivers/iio/frequency/ad9910.c
> new file mode 100644
> index 0000000000000..b41b011af2812
> --- /dev/null
> +++ b/drivers/iio/frequency/ad9910.c
[ ... ]
> +static int ad9910_parse_fw(struct ad9910_state *st)
> +{
[ ... ]
> +	st->data.pll_enabled = device_property_read_bool(dev, "adi,pll-enable");
> +	if (st->data.pll_enabled) {
> +		prop = "adi,charge-pump-current-microamp";
[ ... ]
> +		st->data.pll_charge_pump_current = tmp;
> +
> +		prop = "adi,refclk-out-drive-strength";
> +		if (device_property_present(dev, prop)) {
> +			ret = device_property_match_property_string(dev, prop,
> +								    refclk_out_drv0,
> +								    ARRAY_SIZE(refclk_out_drv0));
> +			if (ret < 0)
> +				return dev_err_probe(dev, ret, "property read: %s\n", prop);
> +
> +			st->data.refclk_out_drv = ret;
> +		}
> +	}
> +
> +	return 0;
> +}

[Severity: Medium]
Does this inadvertently ignore the "adi,refclk-out-drive-strength" property
when the internal PLL is disabled?

Because this property is parsed inside the if (st->data.pll_enabled) block,
the reference clock output drive strength cannot be configured if the PLL
is disabled. This occurs even though the hardware supports outputting the
reference clock independently of the PLL state.

Should the parsing of "adi,refclk-out-drive-strength" be moved outside of
this conditional so it can be utilized in all cases?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260722-ad9910-iio-driver-v9-0-459d1df5ac56@analog.com?part=10