Re: [PATCH v2 2/3] arm64: dts: allwinner: a523: add IR receiver nodes

[Andre Przywara <andre.przywara@arm.com>]

On Wed, 22 Jul 2026 16:17:16 -0400
Justin Suess <utilityemal77@gmail.com> wrote:

Hi Justin,

thanks for the update!

> The A523 has two CIR receivers, both compatible with the A31 CIR: one
> in the CPUX domain, clocked from the main CCU, and one in the RTC
> power domain, clocked from the R-CCU.
> 
> Add nodes for both instances, disabled by default. Since the RX signal
> of each instance can be routed to more than one pin, boards with an IR
> receiver are expected to add the pinctrl properties next to where they
> enable the node. Keep the PL11 pin description in the dtsi, as boards
> commonly use that pin for the RTC domain instance.
> 
> Cc: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Justin Suess <utilityemal77@gmail.com>

I compared the values against the manual, and can confirm that they
match. Also tested both interfaces. Just one nit below, but regardless:

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

> ---
>  .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 28 +++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index ca6a16807049..19771aac68e5 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -327,6 +327,17 @@ ccu: clock-controller@2001000 {
>  			#reset-cells = <1>;
>  		};
>  
> +		ir: ir@2005000 {
> +			compatible = "allwinner,sun55i-a523-ir",
> +				     "allwinner,sun6i-a31-ir";
> +			reg = <0x02005000 0x400>;
> +			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_IR_RX>, <&ccu CLK_IR_RX>;
> +			clock-names = "apb", "ir";
> +			resets = <&ccu RST_BUS_IR_RX>;
> +			status = "disabled";
> +		};
> +
>  		ledc: led-controller@2008000 {
>  			compatible = "allwinner,sun55i-a523-ledc",
>  				     "allwinner,sun50i-a100-ledc";
> @@ -927,6 +938,23 @@ r_i2c_pins: r-i2c-pins {
>  				allwinner,pinmux = <2>;
>  				function = "r_i2c0";
>  			};
> +
> +			r_ir_rx_pin: r-ir-rx-pin {
> +				pins = "PL11";
> +				allwinner,pinmux = <2>;
> +				function = "s_cir";

I think the function name should be "s_cir_rx", as there are IR TX pins
as well. And we used "{s_,}[c]ir_rx" for previous SoCs already.

Cheers,
Andre

> +			};
> +		};
> +
> +		r_ir: ir@7040000 {
> +			compatible = "allwinner,sun55i-a523-ir",
> +				     "allwinner,sun6i-a31-ir";
> +			reg = <0x07040000 0x400>;
> +			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&r_ccu CLK_BUS_R_IR_RX>, <&r_ccu CLK_R_IR_RX>;
> +			clock-names = "apb", "ir";
> +			resets = <&r_ccu RST_BUS_R_IR_RX>;
> +			status = "disabled";
>  		};
>  
>  		pck600: power-controller@7060000 {