Re: [PATCH v19 3/4] arm64: dts: renesas: rzg3l-smarc-som: Enable SD/eMMC on SDHI0

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Inconsistent use of the RZG2L_PORT_PINMUX macro in a file that otherwise strictly uses RZG3L_PORT_PINMUX.
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--- Patch [3]: [PATCH v19 3/4] arm64: dts: renesas: rzg3l-smarc-som: Enable SD/eMMC on SDHI0 ---
commit dcc213ca53944f7a953171eac4a8625b70907250
Author: Biju Das <biju.das.jz@bp.renesas.com>

arm64: dts: renesas: rzg3l-smarc-som: Enable SD/eMMC on SDHI0

This commit adds support for enabling SD card or eMMC on SDHI0 on the
RZ/G3L SMARC SoM. The selection between SD and eMMC is controlled by the
SW_SD0_DEV_SEL macro in the board DTS. By default, eMMC is enabled.

> diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
> index 091a227233cba..c365b8087520b 100644
> --- a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
[ ... ]
> @@ -216,7 +234,134 @@ i2c0_pins: i2c0 {
[ ... ]
> +	sdhi0_usd_pins: sd0-usd {
> +		sd0-cd {
> +			pinmux = <RZG2L_PORT_PINMUX(5, 0, 8)>; /* SD0_CD */

[Severity: Low]
This isn't a bug, but should this macro be RZG3L_PORT_PINMUX(5, 0, 8) instead?

Since the rest of the file appears to use the RZG3L_PORT_PINMUX wrapper,
would it make sense to keep the styling consistent?

> +		};
> +
> +		sd0-clk {
[ ... ]
> +	sdhi0_usd_uhs_pins: sd0-usd-uhs {
> +		sd0-cd {
> +			pinmux = <RZG2L_PORT_PINMUX(5, 0, 8)>; /* SD0_CD */

[Severity: Low]
This isn't a bug, but the same question applies here regarding the use of
RZG2L_PORT_PINMUX instead of the RZG3L variant.

> +		};
> +

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260723154154.319674-1-biju.das.jz@bp.renesas.com?part=3