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From: sashiko-bot@kernel.org
To: "Liu Changjie" <liucj1228@outlook.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 7/9] ARM: dts: stm32: add STM32H7R7 SoC
Date: Sun, 26 Jul 2026 16:21:49 +0000	[thread overview]
Message-ID: <20260726162150.EBCC41F000E9@smtp.kernel.org> (raw)
In-Reply-To: <MN0PR19MB6091A851B810B5876AEB5123ACCD2@MN0PR19MB6091.namprd19.prod.outlook.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The unit-addresses of the GPIO child nodes within the pinctrl block do not match their `reg` properties.
--

--- Patch [7]: [PATCH 7/9] ARM: dts: stm32: add STM32H7R7 SoC ---
commit 1a7b22190cc58150c29992f6135b131116e8634f
Author: Liu Changjie <liucj1228@outlook.com>

ARM: dts: stm32: add STM32H7R7 SoC

This commit adds the device tree include file for the STM32H7R7 SoC.
It describes the Cortex-M7 CPU, various clocks, EXTI, system configuration
controller, and GPIO banks available on these devices.

> diff --git a/arch/arm/boot/dts/st/stm32h7r7.dtsi b/arch/arm/boot/dts/st/stm32h7r7.dtsi
> new file mode 100644
> --- /dev/null
> +++ b/arch/arm/boot/dts/st/stm32h7r7.dtsi

[ ... ]

> +		pinctrl: pinctrl@58020000 {
> +			compatible = "st,stm32h7rs-pinctrl";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0x58020000 0x4000>;
> +			interrupt-parent = <&exti>;
> +			st,syscfg = <&syscfg 0x130>;
> +
> +			gpioa: gpio@58020000 {
> +				reg = <0x0 0x400>;

[Severity: Low]
The pinctrl parent node maps child nodes to a relative, zero-based local
address space via the ranges property, so the reg property is correctly set
to 0x0.

Should the unit-address in the node name match the first address in the
reg property (e.g., gpio@0 instead of gpio@58020000) to avoid dtc validation
warnings about unit_address_vs_reg? This same pattern appears to affect the
other GPIO banks in this block as well.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1785080950.git.liucj1228@outlook.com?part=7

  reply	other threads:[~2026-07-26 16:21 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <cover.1785080950.git.liucj1228@outlook.com>
2026-07-23 15:48 ` [PATCH 1/9] dt-bindings: arm: stm32: add Ruiside ART-Pi2 Liu Changjie
2026-07-23 15:48 ` [PATCH 2/9] dt-bindings: clock: stm32: add STM32H7RS RCC Liu Changjie
2026-07-26 16:15   ` sashiko-bot
2026-07-23 15:48 ` [PATCH 3/9] clk: stm32: add STM32H7RS RCC driver Liu Changjie
2026-07-23 15:49 ` [PATCH 4/9] dt-bindings: pinctrl: stm32: add STM32H7RS Liu Changjie
2026-07-23 15:49 ` [PATCH 5/9] pinctrl: stm32: add STM32H7RS support Liu Changjie
2026-07-23 15:49 ` [PATCH 6/9] ARM: stm32: add STM32H7R7 platform support Liu Changjie
2026-07-23 15:49 ` [PATCH 7/9] ARM: dts: stm32: add STM32H7R7 SoC Liu Changjie
2026-07-26 16:21   ` sashiko-bot [this message]
2026-07-23 15:49 ` [PATCH 8/9] ARM: dts: stm32: add Ruiside ART-Pi2 board Liu Changjie
2026-07-26 16:21   ` sashiko-bot
2026-07-23 15:49 ` [PATCH 9/9] ARM: stm32: document STM32H7R7 support Liu Changjie

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