From: Andre Przywara <andre.przywara@arm.com>
To: "Sören Hantel" <fugininsane@gmail.com>
Cc: u-boot@lists.u-boot-project.org, "Peng Fan" <peng.fan@nxp.com>,
"Jaehoon Chung" <jh80.chung@samsung.com>,
"Tom Rini" <trini@konsulko.com>,
"Sören Hantel" <fugininsane@googlemail.com>,
"Omar Ivan Fardjoume" <ivan.fardjoume@gmail.com>
Subject: Re: [PATCH] mmc: sunxi: Fix mod clock register offset for the A80
Date: Mon, 27 Jul 2026 00:41:06 +0200 [thread overview]
Message-ID: <20260727004106.47219647@ryzen.lan> (raw)
In-Reply-To: <20260722162126.2790195-1-fugininsane@googlemail.com>
On Wed, 22 Jul 2026 18:21:26 +0200
"Sören Hantel" <fugininsane@gmail.com> wrote:
Hi Sören,
I just realised why this problem was so familiar: Omar had sent
basically the same patch in April[1], and I queued it for the next merge
window (which is now).
[1]
https://lore.kernel.org/u-boot/CAM+fx6Ny0ncWr=6nxTWpy_VpaRj-R4pkU_fNcVEdK-B35O4GSg@mail.gmail.com/T/#u
So apologies, but this means that Omar's patch wins.
Many thanks for caring and sending the patch upstream. It looks
like the A80 still lacks some functionality, so there should be more
opportunities to contribute.
Cheers,
Andre
> get_mclk_offset() checks CONFIG_MACH_SUN9I_A80, but no such Kconfig
> symbol exists - the A80 is covered by CONFIG_MACH_SUN9I. The check
> therefore always fails and the function falls through to the default
> offset 0x88, which lies in a reserved region of the A80 CCU. All mod
> clock writes from U-Boot proper end up there and are silently lost,
> so the SD/MMC controllers keep running at whatever clock the
> SPL/BROM left behind.
>
> For the eMMC on SDC2 that means card identification runs at the
> ~48 MHz the SPL used for loading U-Boot instead of 400 kHz: short
> responses still limp along, but long (R2) responses are received as
> all-ones, CMD2/ALL_SEND_CID fails and mmc_init() returns -110. This
> went unnoticed for years because the SPL uses the legacy code path
> with a hardcoded mclk address, so booting *from* eMMC still worked -
> only U-Boot proper could never access the eMMC on sun9i.
>
> Use the correct Kconfig symbol so the mod clock writes reach the SDC
> clock registers at CCU offset 0x410.
>
> Tested on a Cubietech Cubieboard4: eMMC identification now succeeds
> and distro boot from the eMMC works.
>
> Fixes: 0237b3047e25 ("mmc: sunxi: Refactor mod clock register offset")
> Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
> Signed-off-by: Sören Hantel <fugininsane@googlemail.com>
> ---
> drivers/mmc/sunxi_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
> index e28c81af..623393fc 100644
> --- a/drivers/mmc/sunxi_mmc.c
> +++ b/drivers/mmc/sunxi_mmc.c
> @@ -663,7 +663,7 @@ static const struct dm_mmc_ops sunxi_mmc_ops = {
>
> static unsigned get_mclk_offset(void)
> {
> - if (IS_ENABLED(CONFIG_MACH_SUN9I_A80))
> + if (IS_ENABLED(CONFIG_MACH_SUN9I))
> return 0x410;
>
> if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
next prev parent reply other threads:[~2026-07-26 22:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-22 16:21 [PATCH] mmc: sunxi: Fix mod clock register offset for the A80 Sören Hantel
2026-07-26 22:41 ` Andre Przywara [this message]
2026-07-27 0:32 ` Sören Hantel
[not found] <20260722162126.2790195-1-fugininsane@googlemail.com_quarantine>
2026-07-23 10:26 ` Andre Przywara
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