Re: [PATCH v8 29/35] pinctrl: airoha: an7583: add support for olt pinmux

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly added `olt` pin function does not mutually clear the conflicting `pon_alt` mode bit in the multiplexer register (and vice versa), which can lead to hardware contention on shared pins.
--

--- Patch [29]: [PATCH v8 29/35] pinctrl: airoha: an7583: add support for olt pinmux ---
commit dfa91fb93c20433233178722bd1f6d37b1ea9b99
Author: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>

pinctrl: airoha: an7583: add support for olt pinmux
    
Add support for olt pin function for olt pin group.

> diff --git a/drivers/pinctrl/airoha/pinctrl-an7583.c b/drivers/pinctrl/airoha/pinctrl-an7583.c
> index 7e94dcb3b61a5..74f93327d41a1 100644
> --- a/drivers/pinctrl/airoha/pinctrl-an7583.c
> +++ b/drivers/pinctrl/airoha/pinctrl-an7583.c

[ ... ]

> @@ -648,6 +652,19 @@ static const struct airoha_pinctrl_func_group pon_func_group[] = {
>  	},
>  };
>  
> +static const struct airoha_pinctrl_func_group olt_func_group[] = {
> +	{
> +		.name = "olt",
> +		.regmap[0] = {
> +			AIROHA_FUNC_MUX,
> +			REG_GPIO_PON_MODE,
> +			GPIO_OLT_MODE_MASK,
               ^^^^^^^^^^^^^^^^^^

[Severity: High]
Does this mask need to include GPIO_PON_ALT_MODE_MASK to prevent hardware
contention on shared pins 36-40?

If a bootloader previously configured the pins for pon_alt mode, both the
OLT and PON_ALT controllers might be routed to the same physical pins
simultaneously, because GPIO_PON_ALT_MODE_MASK wouldn't be cleared when
applying this OLT configuration.

Additionally, should the pre-existing pon_func_group be updated in this patch
to clear GPIO_OLT_MODE_MASK when configuring pon_alt, to prevent the reverse
conflict if switching dynamically from OLT back to PON_ALT?

> +			GPIO_OLT_MODE_MASK
> +		},
> +		.regmap_size = 1,
> +	},
> +};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260727174141.664933-1-mikhail.kshevetskiy@iopsys.eu?part=29