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Retype all PAMU register base pointers from unsigned long to void __iomem with proper __iomem annotations throughout get_pamu_cap_values(), setup_one_pamu(), and fsl_pamu_probe(), eliminating unsafe casts. Initialize size to 0 to prevent use of an uninitialized value if of_get_address() fails. devm_platform_ioremap_resource(pdev, 0) is safe here: all 10 DTSI files define non-overlapping child pamu@N reg values, each exactly 0x1000 bytes, translated correctly via the parent ranges property. The t4240 special case (no children, parent node probed directly with reg = <0x20000 0x6000>) also maps correctly as the loop iterates over the full region in PAMU_OFFSET steps. Assisted-by: Opencode:Big-Pickle Signed-off-by: Rosen Penev --- drivers/iommu/fsl_pamu.c | 49 ++++++++++++++++------------------------ 1 file changed, 20 insertions(+), 29 deletions(-) diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c index c83bbc3faad5..86f221e21b6e 100644 --- a/drivers/iommu/fsl_pamu.c +++ b/drivers/iommu/fsl_pamu.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include @@ -402,26 +401,25 @@ static void setup_omt(struct ome *omt) * Get the maximum number of PAACT table entries * and subwindows supported by PAMU */ -static void get_pamu_cap_values(unsigned long pamu_reg_base) +static void get_pamu_cap_values(void __iomem *pamu_reg_base) { u32 pc_val; - pc_val = in_be32((u32 *)(pamu_reg_base + PAMU_PC3)); + pc_val = in_be32(pamu_reg_base + PAMU_PC3); /* Maximum number of subwindows per liodn */ max_subwindow_count = 1 << (1 + PAMU_PC3_MWCE(pc_val)); } /* Setup PAMU registers pointing to PAACT, SPAACT and OMT */ -static int setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_size, +static int setup_one_pamu(void __iomem *pamu_reg_base, unsigned long pamu_reg_size, phys_addr_t ppaact_phys, phys_addr_t spaact_phys, phys_addr_t omt_phys) { - u32 *pc; - struct pamu_mmap_regs *pamu_regs; + u32 __iomem *pc; + struct pamu_mmap_regs __iomem *pamu_regs; - pc = (u32 *) (pamu_reg_base + PAMU_PC); - pamu_regs = (struct pamu_mmap_regs *) - (pamu_reg_base + PAMU_MMAP_REGS_BASE); + pc = pamu_reg_base + PAMU_PC; + pamu_regs = pamu_reg_base + PAMU_MMAP_REGS_BASE; /* set up pointers to corenet control blocks */ @@ -449,8 +447,7 @@ static int setup_one_pamu(unsigned long pamu_reg_base, unsigned long pamu_reg_si * & enable PAMU access violation interrupts. */ - out_be32((u32 *)(pamu_reg_base + PAMU_PICS), - PAMU_ACCESS_VIOLATION_ENABLE); + out_be32(pamu_reg_base + PAMU_PICS, PAMU_ACCESS_VIOLATION_ENABLE); out_be32(pc, PAMU_PC_PE | PAMU_PC_OCE | PAMU_PC_SPCC | PAMU_PC_PPCC); return 0; } @@ -749,10 +746,10 @@ static int fsl_pamu_probe(struct platform_device *pdev) struct ccsr_guts __iomem *guts_regs = NULL; u32 pamubypenr, pamu_counter; unsigned long pamu_reg_off; - unsigned long pamu_reg_base; + void __iomem *pamu_reg_base; struct pamu_isr_data *data = NULL; struct device_node *guts_node; - u64 size; + u64 size = 0; struct page *p; int ret = 0; int irq; @@ -773,25 +770,22 @@ static int fsl_pamu_probe(struct platform_device *pdev) if (WARN_ON(probed)) return -EBUSY; - pamu_regs = of_iomap(dev->of_node, 0); - if (!pamu_regs) { - dev_err(dev, "ioremap of PAMU node failed\n"); - return -ENOMEM; - } - of_get_address(dev->of_node, 0, &size, NULL); + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; - irq = irq_of_parse_and_map(dev->of_node, 0); - if (!irq) { - dev_warn(dev, "no interrupts listed in PAMU node\n"); - goto error; - } + pamu_regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(pamu_regs)) + return PTR_ERR(pamu_regs); data = kzalloc_obj(*data); if (!data) { ret = -ENOMEM; goto error; } + data->pamu_reg_base = pamu_regs; + of_get_address(dev->of_node, 0, &size, NULL); data->count = size / PAMU_OFFSET; /* The ISR needs access to the regs, so we won't iounmap them */ @@ -817,7 +811,7 @@ static int fsl_pamu_probe(struct platform_device *pdev) } /* read in the PAMU capability registers */ - get_pamu_cap_values((unsigned long)pamu_regs); + get_pamu_cap_values(pamu_regs); /* * To simplify the allocation of a coherency domain, we allocate the * PAACT and the OMT in the same memory buffer. Unfortunately, this @@ -882,7 +876,7 @@ static int fsl_pamu_probe(struct platform_device *pdev) for (pamu_reg_off = 0, pamu_counter = 0x80000000; pamu_reg_off < size; pamu_reg_off += PAMU_OFFSET, pamu_counter >>= 1) { - pamu_reg_base = (unsigned long)pamu_regs + pamu_reg_off; + pamu_reg_base = pamu_regs + pamu_reg_off; setup_one_pamu(pamu_reg_base, pamu_reg_off, ppaact_phys, spaact_phys, omt_phys); /* Disable PAMU bypass for this PAMU */ @@ -910,9 +904,6 @@ static int fsl_pamu_probe(struct platform_device *pdev) kfree_sensitive(data); - if (pamu_regs) - iounmap(pamu_regs); - if (guts_regs) iounmap(guts_regs); -- 2.55.0