From: sashiko-bot@kernel.org
To: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v4 3/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch
Date: Tue, 28 Jul 2026 07:21:15 +0000 [thread overview]
Message-ID: <20260728072115.5FF571F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260728-eliza_evk-v4-3-decc7fe5246e@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Leaf PCI endpoints are incorrectly defined with PCI-to-PCI bridge properties.
--
--- Patch [3]: [PATCH v4 3/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch ---
commit 6015c0e26c5513007cdd5660f441396cf00de5ea
Author: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch
This commit adds support for a PCIe switch (TC9563) on the Eliza EVK board
connected to PCIe1. It overrides the base iommu-map to cover the downstream
ports and uses a TLMM GPIO for reset assertion instead of PERST#.
> diff --git a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> index b35fffb509765..32a0fdd80c8a8 100644
> --- a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> +++ b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
[ ... ]
> @@ -99,6 +119,99 @@ pcieport0_ep: endpoint {
[ ... ]
> + pcie@3,0 {
> + reg = <0x21800 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x5 0xff>;
> +
> + pci@0,0 {
> + reg = <0x50000 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + };
> +
> + pci@0,1 {
> + reg = <0x50100 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + };
[Severity: Low]
Are these leaf PCI endpoints supposed to have PCI-to-PCI bridge properties?
The devicetree parser and schema validation tools might incorrectly interpret
these leaf PCI endpoints as PCI-to-PCI bridges due to the presence of
device_type = "pci", #address-cells, #size-cells, and ranges properties on
nodes that represent endpoint functions rather than buses.
> + };
> + };
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260728-eliza_evk-v4-0-decc7fe5246e@oss.qualcomm.com?part=3
next prev parent reply other threads:[~2026-07-28 7:21 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-28 7:06 [PATCH v4 0/3] arm64: dts: qcom: eliza-evk: Enable PCIe0 and PCIe1 with M.2 and TC9563 switch Krishna Chaitanya Chundru
2026-07-28 7:06 ` [PATCH v4 1/3] arm64: dts: qcom: eliza: Add PCIe PHY and controller nodes Krishna Chaitanya Chundru
2026-07-28 7:21 ` sashiko-bot
2026-07-28 7:06 ` [PATCH v4 2/3] arm64: dts: qcom: eliza-evk: Add PCIe0 with M.2 E key connector Krishna Chaitanya Chundru
2026-07-28 7:22 ` sashiko-bot
2026-07-28 7:06 ` [PATCH v4 3/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch Krishna Chaitanya Chundru
2026-07-28 7:21 ` sashiko-bot [this message]
2026-07-28 8:08 ` Konrad Dybcio
2026-07-28 8:08 ` Konrad Dybcio
2026-07-28 8:05 ` [PATCH v4 0/3] arm64: dts: qcom: eliza-evk: Enable PCIe0 and PCIe1 with M.2 and TC9563 switch Bartosz Golaszewski
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