All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Logan Gunthorpe" <logang@deltatee.com>
Cc: vkoul@kernel.org, Frank.Li@kernel.org, linux-pci@vger.kernel.org,
	dmaengine@vger.kernel.org
Subject: Re: [PATCH v4 04/12] dmaengine: switchtec-dma: halt channel on alloc_chan_resources error
Date: Tue, 28 Jul 2026 17:35:12 +0000	[thread overview]
Message-ID: <20260728173512.F3F651F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260728171523.112244-5-logang@deltatee.com>

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

New issues:
- [High] Intentionally leaking descriptors to prevent hardware UAF leaves dangling pointers in the channel structure, causing a UAF if a subsequent allocation fails, or a permanent leak if it succeeds.

Pre-existing issues:
- [Critical] Zeroing DMA base registers while the channel fails to halt redirects active DMA transactions to physical address 0.
- [High] Holding a spinlock while polling for up to 100ms violates core kernel locking rules and can trigger softlockups.
--

--- Patch [4]: [PATCH v4 04/12] dmaengine: switchtec-dma: halt channel on alloc_chan_resources error ---
commit 886fa8092e9d55e67d82b2e1ee9d1125fcadac6d
Author: Logan Gunthorpe <logang@deltatee.com>

dmaengine: switchtec-dma: halt channel on alloc_chan_resources error

This patch modifies the error unwind path in channel allocation to call
switchtec_dma_chan_stop() before disabling the channel. This prevents a
hardware use-after-free by ensuring the channel is successfully halted
before freeing the descriptor rings. If the halt fails, it skips freeing
the rings.

Link: https://lore.kernel.org/dmaengine/20260717223647.F0A051F000E9@smtp.kernel.org
Link: https://lore.kernel.org/dmaengine/20260727185101.D221C1F000E9@smtp.kernel.org

> diff --git a/drivers/dma/switchtec_dma.c b/drivers/dma/switchtec_dma.c
> index cbbc9ad082471..25b988e9b4afb 100644
> --- a/drivers/dma/switchtec_dma.c
> +++ b/drivers/dma/switchtec_dma.c
> @@ -1047,6 +1047,10 @@ static int switchtec_dma_alloc_chan_resources(struct dma_chan *chan)
>  	swdma_chan->comp_ring_active = false;
>  	spin_unlock_bh(&swdma_chan->complete_lock);
>  err_disable_channel:
> +	if (switchtec_dma_chan_stop(swdma_chan)) {

[Severity: Critical]
This is a pre-existing issue, but does writing 0 to the DMA base registers
redirect active DMA transactions to physical address 0x0?

Looking at switchtec_dma_chan_stop(), if the halt times out, the registers
are still cleared:

drivers/dma/switchtec_dma.c:switchtec_dma_chan_stop() {
        rc = halt_channel(swdma_chan);
        ...
        if (rc)
                pci_err(pdev, "Channel %d halt timed out...");

        writel(0, &swdma_chan->mmio_chan_fw->sq_base_lo);
        ...
}

Since the channel is still unhalted and active, modifying these live
registers might cause ongoing or pending hardware DMA descriptor fetches to
target physical address 0x0.


[Severity: High]
This is a pre-existing issue, but can this call chain trigger softlockups
by holding a spinlock for up to 100ms?

switchtec_dma_chan_stop() calls halt_channel(), which acquires a spinlock
before polling:

drivers/dma/switchtec_dma.c:halt_channel() {
        spin_lock(&swdma_chan->hw_ctrl_lock);
        writeb(SWITCHTEC_CHAN_CTRL_HALT, &chan_hw->ctrl);
        ret = wait_for_chan_status(chan_hw, SWITCHTEC_CHAN_STS_HALTED, true);
        spin_unlock(&swdma_chan->hw_ctrl_lock);
}

And wait_for_chan_status() performs a 100ms atomic polling loop:

drivers/dma/switchtec_dma.c:wait_for_chan_status() {
        return readl_poll_timeout_atomic(&chan_hw->status, status,
                                         ..., 10, 100 * USEC_PER_MSEC);
}

Holding the spinlock disables preemption for the duration of the timeout,
which might cause severe scheduling latency spikes.

> +		disable_channel(swdma_chan);
> +		return rc;

[Severity: High]
When returning here, the descriptors are intentionally leaked to prevent a
hardware use-after-free, but do the pointers in swdma_chan remain populated?

If a subsequent allocation fails in switchtec_dma_alloc_desc(), it will call
switchtec_dma_free_desc() which frees these exact pointers while the hardware
might still be accessing them. 

If the allocation succeeds, the pointers will be overwritten:

drivers/dma/switchtec_dma.c:switchtec_dma_alloc_desc() {
        swdma_chan->hw_sq = dma_alloc_coherent(..., GFP_NOWAIT);
}

Could this lead to a use-after-free on a subsequent allocation error, or a
permanent memory leak if the pointers are overwritten?

> +	}
>  	disable_channel(swdma_chan);
>  err_free_desc:
>  	switchtec_dma_free_desc(swdma_chan);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260728171523.112244-1-logang@deltatee.com?part=4

  reply	other threads:[~2026-07-28 17:35 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-28 17:15 [PATCH v4 00/12] dmaengine: miscellaneous fixes for ioat, switchtec_dma and plx_dma Logan Gunthorpe
2026-07-28 17:15 ` [PATCH v4 01/12] dmaengine: switchtec-dma: fix double-free in switchtec_dma_free_desc() Logan Gunthorpe
2026-07-28 17:34   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 02/12] dmaengine: switchtec-dma: fix resource leak in alloc_chan_resources Logan Gunthorpe
2026-07-28 17:40   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 03/12] dmaengine: switchtec-dma: always clear DMA base registers on chan_stop() Logan Gunthorpe
2026-07-28 17:34   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 04/12] dmaengine: switchtec-dma: halt channel on alloc_chan_resources error Logan Gunthorpe
2026-07-28 17:35   ` sashiko-bot [this message]
2026-07-28 17:15 ` [PATCH v4 05/12] dmaengine: switchtec-dma: fix channel leak on registration failure Logan Gunthorpe
2026-07-28 17:38   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 06/12] dmaengine: switchtec-dma: make switchtec_dma_chans_release() void Logan Gunthorpe
2026-07-28 17:44   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 07/12] dmaengine: switchtec-dma: fix chan_status_irq cleanup on create() error Logan Gunthorpe
2026-07-28 17:39   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 08/12] dmaengine: switchtec-dma: disable channels before freeing on registration failure Logan Gunthorpe
2026-07-28 17:39   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 09/12] dmaengine: switchtec-dma: fix use-after-free of swdma_dev in remove() Logan Gunthorpe
2026-07-28 17:48   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 10/12] dmaengine: ioat: disable relaxed ordering before registering the device Logan Gunthorpe
2026-07-28 17:53   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 11/12] dmaengine: ioat: use sysfs_emit() in per-channel sysfs show() Logan Gunthorpe
2026-07-28 17:48   ` sashiko-bot
2026-07-28 17:15 ` [PATCH v4 12/12] dmaengine: plx_dma: fix NULL pointer deref in plx_dma_isr() Logan Gunthorpe
2026-07-28 17:50   ` sashiko-bot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260728173512.F3F651F00A3A@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=Frank.Li@kernel.org \
    --cc=dmaengine@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=logang@deltatee.com \
    --cc=sashiko-reviews@lists.linux.dev \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.