From: sashiko-bot@kernel.org
To: "Chang S. Bae" <chang.seok.bae@intel.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v6 01/20] KVM: x86: Extend VCPU registers for EGPRs
Date: Wed, 29 Jul 2026 20:04:05 +0000 [thread overview]
Message-ID: <20260729200406.01BE11F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260729191656.598771-2-chang.seok.bae@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The patch extends the VCPU register array (`vcpu->arch.regs`) for APX Extended General-Purpose Registers (R16-R31) but omits the required synchronization logic with the guest hardware or XSAVE state, leading to broken register caching and silent guest state corruption.
--
--- Patch [1]: [PATCH v6 01/20] KVM: x86: Extend VCPU registers for EGPRs ---
commit c513074e3dcbca9bda2fa54321ecd4e8c1d2229b
Author: Chang S. Bae <chang.seok.bae@intel.com>
KVM: x86: Extend VCPU registers for EGPRs
This commit extends the VCPU register storage array to include APX Extended
General-Purpose Registers (EGPRs R16-R31) for VMX when KVM_APX is enabled.
It uses VCPU storage to provide an access path for KVM instead of directly
reading the guest fpstate.
Link: https://lore.kernel.org/abL8SW5JS1aV5goa@google.com
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index b517257a63153..48547842d9fa0 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
[ ... ]
> @@ -178,6 +178,24 @@ enum kvm_reg {
> VCPU_REGS_R13,
> VCPU_REGS_R14,
> VCPU_REGS_R15,
> +#endif
> +#ifdef CONFIG_KVM_APX
> + VCPU_REGS_R16,
> + VCPU_REGS_R17,
[Severity: High]
Does adding these registers before NR_VCPU_GENERAL_PURPOSE_REGS break KVM's
register caching assumptions?
KVM assumes all registers defined before NR_VCPU_GENERAL_PURPOSE_REGS are
either eagerly saved and restored by assembly context switches or explicitly
defined in the lazy load set. Because R16-R31 are not in the lazy load set,
KVM's initialization will set their availability bits to 1, assuming they are
always synchronized by hardware context switches.
However, the context switch assembly only saves and restores up to R15 and
does not touch R16-R31. When the KVM host emulator accesses R16-R31 to
emulate an instruction, won't it read stale or uninitialized data from the
software array?
Furthermore, if KVM writes to these registers during emulation, won't those
writes be silently lost upon resuming the guest since they are never
synchronized back to the guest's XSAVE state?
> + VCPU_REGS_R18,
> + VCPU_REGS_R19,
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260729191656.598771-1-chang.seok.bae@intel.com?part=1
next prev parent reply other threads:[~2026-07-29 20:04 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 19:16 [PATCH v6 00/20] KVM: x86: Enable APX for guests Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 01/20] KVM: x86: Extend VCPU registers for EGPRs Chang S. Bae
2026-07-29 20:04 ` sashiko-bot [this message]
2026-07-29 19:16 ` [PATCH v6 02/20] KVM: VMX: Save guest EGPRs in VCPU cache Chang S. Bae
2026-07-29 20:05 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 03/20] KVM: x86: Support APX state for XSAVE ABI Chang S. Bae
2026-07-29 20:31 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 04/20] KVM: VMX: Refactor VMX instruction information access Chang S. Bae
2026-07-29 20:02 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 05/20] KVM: VMX: Refactor instruction information decoding Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 06/20] KVM: VMX: Remove unused control-register access defines Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 07/20] KVM: VMX: Refactor register index retrieval from exit qualification Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 08/20] KVM: VMX: Support instruction information extension Chang S. Bae
2026-07-29 20:00 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 09/20] KVM: nVMX: Propagate extended instruction information Chang S. Bae
2026-07-29 20:01 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 10/20] KVM: x86: Support EGPR accessing and tracking for emulator Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 11/20] KVM: x86: Handle EGPR index and REX2-incompatible opcodes Chang S. Bae
2026-07-29 20:04 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 12/20] KVM: x86: Support REX2-prefixed opcode decode Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 13/20] KVM: x86: Reject EVEX-prefixed instructions Chang S. Bae
2026-07-29 19:58 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 14/20] KVM: x86: Move KVM_SUPPORTED_{XCR0,XSS} into kvm_x86_vendor_init() Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 15/20] KVM: x86: Guard valid XCR0.APX settings Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 16/20] KVM: x86: Add APX to supported XCR0 Chang S. Bae
2026-07-29 20:06 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 17/20] KVM: x86: Expose APX foundation feature to userspace Chang S. Bae
2026-07-29 19:16 ` [PATCH v6 18/20] KVM: x86: Expose APX sub-features " Chang S. Bae
2026-07-29 20:01 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 19/20] KVM: x86: selftests: Add APX state and ABI test Chang S. Bae
2026-07-29 20:08 ` sashiko-bot
2026-07-29 19:16 ` [PATCH v6 20/20] KVM: x86: selftests: Add APX state handling and XCR0 sanity checks Chang S. Bae
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