From: sashiko-bot@kernel.org
To: "Louis-Alexis Eyraud" <louisalexis.eyraud@collabora.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 16/24] clk: mediatek: Add MT8189 topckgen clock support
Date: Thu, 30 Jul 2026 10:05:33 +0000 [thread overview]
Message-ID: <20260730100534.1C2091F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260729-mt8189-clocks-system-base-v4-16-e356b813a64c@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Use-After-Free of `struct clk` during probe error path and device removal due to asymmetric teardown between devm and manual unregistration.
--
--- Patch [16]: [PATCH v4 16/24] clk: mediatek: Add MT8189 topckgen clock support ---
commit 1a2a1cefef48aac7c733656cfc07df67d4760fe4
Author: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
clk: mediatek: Add MT8189 topckgen clock support
Add support for the MT8189 topckgen clock controller, which provides
muxes and dividers for clock selection in other IP blocks.
> diff --git a/drivers/clk/mediatek/clk-mt8189-topckgen.c b/drivers/clk/mediatek/clk-mt8189-topckgen.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-mt8189-topckgen.c
[ ... ]
> +/* Register mux notifier for MFG mux */
> +static int clk_mt8189_reg_mfg_mux_notifier(struct device *dev,
> + struct clk *clk)
> +{
> + struct mtk_mux_nb *mfg_mux_nb;
> +
> + mfg_mux_nb = devm_kzalloc(dev, sizeof(*mfg_mux_nb), GFP_KERNEL);
> + if (!mfg_mux_nb)
> + return -ENOMEM;
> +
> + mfg_mux_nb->ops = &mtk_mux_clr_set_upd_ops;
> + mfg_mux_nb->bypass_index = 0; /* Bypass to CLK_TOP_MFG_REF_SEL */
> +
> + return devm_mtk_clk_mux_notifier_register(dev, clk, mfg_mux_nb);
> +}
[Severity: High]
This is a pre-existing issue, but does using
devm_mtk_clk_mux_notifier_register() here introduce a use-after-free during
driver unbinding or probe failure?
If mtk_clk_simple_probe() fails after registering this notifier, or when
the module is removed via mtk_clk_simple_remove(), the manual teardown
functions like mtk_clk_unregister_muxes() execute immediately. This calls
clk_hw_unregister(), which frees the struct clk object.
Later, the driver core initiates devres cleanup and invokes
devm_clk_notifier_release(). This function will call
clk_notifier_unregister() using the already freed clk pointer.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260729-mt8189-clocks-system-base-v4-0-e356b813a64c@collabora.com?part=16
next prev parent reply other threads:[~2026-07-30 10:05 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-29 10:02 [PATCH v4 00/24] MT8189: Add support for system and base clock controllers Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 01/24] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8186 Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 02/24] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8192 Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 03/24] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 04/24] dt-bindings: clock: mediatek: reorder MT8186 compatibles Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 05/24] dt-bindings: clock: mediatek: regroup MT8188 dt-bindings into MT8186 Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 06/24] dt-bindings: clock: mediatek: regroup MT8192 " Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 07/24] dt-bindings: clock: mediatek: regroup MT8195 " Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 08/24] dt-bindings: clock: mediatek: Add MT8189 system/base clocks and resets Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 09/24] clk: mediatek: Harmonize mtk_pll_fenc related symbol names Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 10/24] clk: mediatek: pll: Add BAR reset register offsets Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 11/24] clk: mediatek: pll: split default prepare/unprepare callbacks Louis-Alexis Eyraud
2026-07-29 10:02 ` [PATCH v4 12/24] clk: mediatek: pll: Add ops for PLLs using set/clr regs Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 13/24] clk: mediatek: pllfh: Add configurable clock ops to mtk_pllfh_data Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 14/24] clk: mediatek: pllfh: Add ops for PLLs using set/clr regs Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:02 ` [PATCH v4 15/24] clk: mediatek: Add MT8189 apmixedsys clock support Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
2026-07-29 10:03 ` [PATCH v4 16/24] clk: mediatek: Add MT8189 topckgen " Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot [this message]
2026-07-29 10:03 ` [PATCH v4 17/24] clk: mediatek: Add MT8189 vlpckgen " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 18/24] clk: mediatek: Add MT8189 vlpcfg " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 19/24] clk: mediatek: Add MT8189 bus " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 20/24] clk: mediatek: Add MT8189 dbgao " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 21/24] clk: mediatek: Add MT8189 dvfsrc " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 22/24] clk: mediatek: Add MT8189 i2c " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 23/24] clk: mediatek: Add MT8189 scp " Louis-Alexis Eyraud
2026-07-29 10:03 ` [PATCH v4 24/24] clk: mediatek: Add MT8189 ufs " Louis-Alexis Eyraud
2026-07-30 10:05 ` sashiko-bot
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