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From: sashiko-bot@kernel.org
To: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v7 3/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch
Date: Thu, 30 Jul 2026 12:24:25 +0000	[thread overview]
Message-ID: <20260730122425.AF3441F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260730-eliza_evk-v7-3-7ac7b66a3e6d@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The `iommu-map` entries use 5 cells per entry, but the QCOM PCIe driver statically expects 4 cells, leading to misaligned array parsing and corrupted BDF-to-SID hardware programming.
--

--- Patch [3]: [PATCH v7 3/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch ---
commit c160148a8023cba78403658572ab0eddfe6fb1b7
Author: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>

arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch

This commit enables PCIe1 on the Eliza EVK board connected to a TC9563
PCIe switch. It configures the management interface over I2C and overrides
the base iommu-map to cover the downstream ports.

> diff --git a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> index b35fffb509765..ccd6f01135132 100644
> --- a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi
> +++ b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi

[ ... ]

> @@ -99,6 +119,91 @@ pcieport0_ep: endpoint {
>  	};
>  };
>  
> +&pcie1 {
> +	iommu-map = <0x0 &apps_smmu 0x1400 0x0 0x1>,
> +		    <0x100 &apps_smmu 0x1401 0x0 0x1>,

[Severity: High]
Will this iommu-map configuration cause corrupted BDF-to-SID hardware
programming?

Looking at qcom_pcie_config_sid_1_9_0() in pcie-qcom.c, the driver reads the
iommu-map property directly into a structure that statically expects exactly
4 fields (bdf, phandle, smmu_sid, smmu_sid_len).

Because these new entries provide 5 cells per tuple (to satisfy apps_smmu
expecting 2 cells), the array parsing will become misaligned after the
first tuple. The second tuple's bdf value will erroneously read the length
field of the first tuple (0x1) instead of 0x100.

This misalignment corrupts the subsequent entries programmed into the
PARF_BDF_TO_SID_TABLE, which leads to SMMU faults for all downstream
devices connected to the switch.

> +		    <0x208 &apps_smmu 0x1402 0x0 0x1>,
> +		    <0x210 &apps_smmu 0x1403 0x0 0x1>,

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260730-eliza_evk-v7-0-7ac7b66a3e6d@oss.qualcomm.com?part=3

      reply	other threads:[~2026-07-30 12:24 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-30 12:00 [PATCH v7 0/3] arm64: dts: qcom: eliza-evk: Enable PCIe0 and PCIe1 with M.2 and TC9563 switch Krishna Chaitanya Chundru
2026-07-30 12:00 ` [PATCH v7 1/3] arm64: dts: qcom: eliza: Add PCIe PHY and controller nodes Krishna Chaitanya Chundru
2026-07-30 12:22   ` sashiko-bot
2026-07-30 12:00 ` [PATCH v7 2/3] arm64: dts: qcom: eliza-evk: Add PCIe0 with M.2 E key connector Krishna Chaitanya Chundru
2026-07-30 12:10   ` sashiko-bot
2026-07-30 12:00 ` [PATCH v7 3/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch Krishna Chaitanya Chundru
2026-07-30 12:24   ` sashiko-bot [this message]

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