From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 265B644A730; Thu, 30 Jul 2026 16:11:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785427910; cv=none; b=ryXaQYHCuKirTNW+j3J1czMGvZxUtmAXluHtPPipGG9CNXFs9PgT4wr2mzo8H0GBi9mU56PvO+LSutT1EAlyu6OY/+IHiioyC+s4RRqHWRb0pnX+lrif09U2pIIIAJqmSzi1DwJCFJyCNZMP4pqho9t4A4xhA/TlXU5bt+zGYt8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785427910; c=relaxed/simple; bh=8RL2e2pl2OAlIChZVJiZFWTzRN886esK3orQpBLssIg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Z3E72RG24pp/VtH/3gEBwfAOn98mq3zoM9lJGzj7QrgaHyWrDigkTCaUVaNJSJzMkij8M9p/l28gHpljCBaH4cwqdXK9jYFnz9slPyE8UkIRWNIhMdyQK2vtZR+UFxNAbDBahAxa8WGj0kQz4jkqbIYZI43NXG+OU9LdWKwV9i0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=Joh+YgJ6; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="Joh+YgJ6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 814C21F000E9; Thu, 30 Jul 2026 16:11:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1785427909; bh=THqyY+yuaNF/b1HYfyCJMzPe73HVZtBdh8DVft5ePaE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Joh+YgJ6PBAopd5/t0NjpIhlrlAcWG/p2KTxSVziTrVb3bgIzW1FSRYnpaOj8d8Wr /ksI26lVRvwdu+YWEV5ofCu42mZ4h9p88ZK8PlMUfhkRPkC9gmlGFSb4Gfbrin0V50 MJYrjfeMyNyG1l34YhuZrHITdIUgVITwR9t4BpB0= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Vitaly Prosyak , Alex Deucher Subject: [PATCH 6.6 337/484] drm/amdgpu/gfx10: replace BUG_ON() with WARN_ON() Date: Thu, 30 Jul 2026 16:13:54 +0200 Message-ID: <20260730141430.804736567@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260730141423.392222816@linuxfoundation.org> References: <20260730141423.392222816@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alex Deucher commit d06c4173a7c38c7a39e98859f839ce714c7af2c9 upstream. There's no need to crash the kernel for these cases. Reviewed-by: Vitaly Prosyak Signed-off-by: Alex Deucher (cherry picked from commit ac6f00beb658239bced4aaed9efbb04a35348d48) Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -3755,7 +3755,7 @@ static void gfx_v10_0_wait_reg_mem(struc WAIT_REG_MEM_ENGINE(eng_sel))); if (mem_space) - BUG_ON(addr0 & 0x3); /* Dword align */ + WARN_ON(addr0 & 0x3); /* Dword align */ amdgpu_ring_write(ring, addr0); amdgpu_ring_write(ring, addr1); amdgpu_ring_write(ring, ref); @@ -8311,7 +8311,7 @@ static void gfx_v10_0_ring_emit_ib_gfx(s control |= 0x400000; amdgpu_ring_write(ring, header); - BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ + WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ amdgpu_ring_write(ring, #ifdef __BIG_ENDIAN (2 << 0) | @@ -8350,7 +8350,7 @@ static void gfx_v10_0_ring_emit_ib_compu } amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); - BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ + WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ amdgpu_ring_write(ring, #ifdef __BIG_ENDIAN (2 << 0) | @@ -8383,9 +8383,9 @@ static void gfx_v10_0_ring_emit_fence(st * aligned if only send 32bit data low (discard data high) */ if (write64bit) - BUG_ON(addr & 0x7); + WARN_ON(addr & 0x7); else - BUG_ON(addr & 0x3); + WARN_ON(addr & 0x3); amdgpu_ring_write(ring, lower_32_bits(addr)); amdgpu_ring_write(ring, upper_32_bits(addr)); amdgpu_ring_write(ring, lower_32_bits(seq)); @@ -8437,9 +8437,6 @@ static void gfx_v10_0_ring_emit_fence_ki { struct amdgpu_device *adev = ring->adev; - /* we only allocate 32bit for each seq wb address */ - BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT); - /* write fence seq to the "addr" */ amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |