From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 58A9719CD1D; Thu, 30 Jul 2026 15:38:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785425930; cv=none; b=UPsP8U7kYKvjWDMmFe1xoksKbf69rHII0Iy+31+JtGdgXW+Dhp99PSkcSxB0hjsQLq2ntfWRC5OBakouLgI/KBi5rG6jeWrcV1zqYzMYIM5qAeH8jOUlOT46Dw461cwl8TnbyBj1yLK5C3pwcYZTeEeDaAnDSBL4aNcudDdX64c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785425930; c=relaxed/simple; bh=9O/vSCo+E6kZ6NrhymTsmaD+o1i8nmIVfAeEGKCPYbI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tN4l5dV2FOOgEuFGZBgg1s7O6cGaDztN+JHHjxIbizicaWYrLFWYyOPFdD3FnU5uwDgD4ZWawMo6VgoGkHAY7Wh0OnIRJmQzllTtQQP7FcQ0hiQptfKF0iDqNiCATqT04x6UsNX2+W8nkC+xvIQ7F3hW5RWn5xt33FndjMuUioU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=XNEVgfND; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="XNEVgfND" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BCD931F000E9; Thu, 30 Jul 2026 15:38:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1785425929; bh=mGYICQty8ELIu5o6tbncgIpHrY9fmfvCnqcjvIft1us=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=XNEVgfNDcFkdOodzfAcPtcEqRDb19nRx877JVeYkC1SSnpwzqGeA9a6vrrwt0EmNc gS3/JFZ5trrytw3+6bQFc+IZhmSXwuHjGsGpSFUIwkVQmgarCppMpZLrvwlrXG6U3X UagviGVeeTnrq0Ym8Rkjs1QK65f/KVObwSTrM/zs= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Alexei Lazar , Carolina Jubran , Tariq Toukan , Pavan Chebbi , Jakub Kicinski , Sasha Levin Subject: [PATCH 6.12 242/602] net/mlx5e: Report zero bandwidth for non-ETS traffic classes Date: Thu, 30 Jul 2026 16:10:34 +0200 Message-ID: <20260730141441.057251228@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260730141435.976815864@linuxfoundation.org> References: <20260730141435.976815864@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alexei Lazar [ Upstream commit ffb1873b2df11945b8c395e859169248675c91c5 ] The IEEE 802.1Qaz standard defines that bandwidth allocation percentages only apply to Enhanced Transmission Selection (ETS) traffic classes. For STRICT and VENDOR transmission selection algorithms, bandwidth percentage values are not applicable. Currently for non-ETS 100 bandwidth is being reported for all traffic classes in the get operation due to hardware limitation, regardless of their TSA type. Fix this by reporting 0 for non-ETS traffic classes. Fixes: 820c2c5e773d ("net/mlx5e: Read ETS settings directly from firmware") Signed-off-by: Alexei Lazar Reviewed-by: Carolina Jubran Signed-off-by: Tariq Toukan Reviewed-by: Pavan Chebbi Link: https://patch.msgid.link/20260717075125.1244877-2-tariqt@nvidia.com Signed-off-by: Jakub Kicinski Signed-off-by: Sasha Levin --- drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c b/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c index 84e700777941ec..d74ff20f825954 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c @@ -158,6 +158,13 @@ static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev, } memcpy(ets->tc_tsa, priv->dcbx.tc_tsa, sizeof(ets->tc_tsa)); + /* Report 0 for non ETS TSA */ + for (i = 0; i < ets->ets_cap; i++) { + if (ets->tc_tx_bw[i] == MLX5E_MAX_BW_ALLOC && + priv->dcbx.tc_tsa[i] != IEEE_8021QAZ_TSA_ETS) + ets->tc_tx_bw[i] = 0; + } + return err; } -- 2.53.0