From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 820C530C143; Thu, 30 Jul 2026 15:48:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785426489; cv=none; b=Ki/lprArtwl6tJ8jbatVvBtdJeUGEx8X4UQNL70HzGyFcpBb1PWeHnI/XaQDRYisDxxVVv2MWv/HfpjbKStFprOosg3hVUBIhNwREGQFyOfTnElvfVvEWjojbPGzKqJgmOqhEaFlk0BFgzg0Y0fA4c0JRYuT1svQOC7K3DHrGhM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785426489; c=relaxed/simple; bh=T3tJMz3nDrW88kRp8LYT82mBjD0KzUMIUpPODtlPFR4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PCVa7pDN6ulQY/eeNAwxNg67++bl6IInvj/puw3noBAYOFMKuk4PckY1JXhwQcF5aOvABncxcP4kTLquQe6e9D324BPrrts0pyEQaNwq7B8PS97g7EdQjJ50NQGzE39DmAAyS7R57cFwaqgGgzv3GK4qjhJOgoXVuH1Vld3n10I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=b02lTvXc; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="b02lTvXc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4D8D71F000E9; Thu, 30 Jul 2026 15:48:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1785426487; bh=8tasKFJnvPHf6khLQE4i7pIvqdmKFM1HsSMvwqybWHs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=b02lTvXc8lFl8FRw+lWPhVt+g2rCY3BdkCHw3KWVgwZMKUa8/I96NiLv/Ko7j1bvv +3bnrKadRubLEUng5UhAbqH0VvtaIRMtqwBS4XRO+LyuCHfc4BT6KXRn247qxQ28cZ o6BVuk8b8ceXjpl1b9GfsfJ19APYwO4dFsH+CDEE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Vitaly Prosyak , Alex Deucher Subject: [PATCH 6.12 438/602] drm/amdgpu/gfx11: replace BUG_ON() with WARN_ON() Date: Thu, 30 Jul 2026 16:13:50 +0200 Message-ID: <20260730141445.169303191@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260730141435.976815864@linuxfoundation.org> References: <20260730141435.976815864@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Alex Deucher commit 0eebcab1ea2a77f086a04108f386f82ee3496022 upstream. There's no need to crash the kernel for these cases. Reviewed-by: Vitaly Prosyak Signed-off-by: Alex Deucher (cherry picked from commit daa62107452d2451787c4248ca38fa2d1a0cbefd) Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -496,7 +496,7 @@ static void gfx_v11_0_wait_reg_mem(struc WAIT_REG_MEM_ENGINE(eng_sel))); if (mem_space) - BUG_ON(addr0 & 0x3); /* Dword align */ + WARN_ON(addr0 & 0x3); /* Dword align */ amdgpu_ring_write(ring, addr0); amdgpu_ring_write(ring, addr1); amdgpu_ring_write(ring, ref); @@ -5673,7 +5673,7 @@ static void gfx_v11_0_ring_emit_ib_gfx(s control |= 0x400000; amdgpu_ring_write(ring, header); - BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ + WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ amdgpu_ring_write(ring, #ifdef __BIG_ENDIAN (2 << 0) | @@ -5712,7 +5712,7 @@ static void gfx_v11_0_ring_emit_ib_compu } amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); - BUG_ON(ib->gpu_addr & 0x3); /* Dword align */ + WARN_ON(ib->gpu_addr & 0x3); /* Dword align */ amdgpu_ring_write(ring, #ifdef __BIG_ENDIAN (2 << 0) | @@ -5745,9 +5745,9 @@ static void gfx_v11_0_ring_emit_fence(st * aligned if only send 32bit data low (discard data high) */ if (write64bit) - BUG_ON(addr & 0x7); + WARN_ON(addr & 0x7); else - BUG_ON(addr & 0x3); + WARN_ON(addr & 0x3); amdgpu_ring_write(ring, lower_32_bits(addr)); amdgpu_ring_write(ring, upper_32_bits(addr)); amdgpu_ring_write(ring, lower_32_bits(seq)); @@ -5805,9 +5805,6 @@ static void gfx_v11_0_ring_emit_fence_ki { struct amdgpu_device *adev = ring->adev; - /* we only allocate 32bit for each seq wb address */ - BUG_ON(flags & AMDGPU_FENCE_FLAG_64BIT); - /* write fence seq to the "addr" */ amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |