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From: Jakub Kicinski <kuba@kernel.org>
To: illusion.wang@nebula-matrix.com
Cc: Jakub Kicinski <kuba@kernel.org>,
	dimon.zhao@nebula-matrix.com, alvin.wang@nebula-matrix.com,
	sam.chen@nebula-matrix.com, netdev@vger.kernel.org,
	andrew+netdev@lunn.ch, corbet@lwn.net, horms@kernel.org,
	linux-doc@vger.kernel.org, pabeni@redhat.com,
	vadim.fedorenko@linux.dev, lukas.bulwahn@redhat.com,
	edumazet@google.com, enelsonmoore@gmail.com,
	skhan@linuxfoundation.org, hkallweit1@gmail.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v22 net-next 02/12] net/nebula-matrix: add core driver architecture and HW layer initialization
Date: Thu, 30 Jul 2026 18:30:25 -0700	[thread overview]
Message-ID: <20260731013025.744937-1-kuba@kernel.org> (raw)
In-Reply-To: <20260723040110.91410-3-illusion.wang@nebula-matrix.com>

This is an AI-generated review of your patch. The human sending this
email has considered the AI review valid, or at least plausible.
---
--- Patch [2]: [PATCH v22 net-next 02/12] net/nebula-matrix: add core driver architecture and HW layer initialization ---
commit b4e4638b25f9e82d490889327022a039dbb63644
Author: illusion wang <illusion.wang@nebula-matrix.com>

net/nebula-matrix: add core driver architecture and HW layer initialization

This commit adds the core driver framework and hardware layer initialization
for the NBL NIC family. It handles basic device capability parsing, DMA
mask fallback, and Leonis hardware BAR resource requests and mappings.

> diff --git a/drivers/net/ethernet/nebula-matrix/nbl/nbl_hw/nbl_hw_leonis/nbl_hw_leonis.c b/drivers/net/ethernet/nebula-matrix/nbl/nbl_hw/nbl_hw_leonis/nbl_hw_leonis.c
> new file mode 100644
> index 0000000000000..79a4b15c01a90
> --- /dev/null
> +++ b/drivers/net/ethernet/nebula-matrix/nbl/nbl_hw/nbl_hw_leonis/nbl_hw_leonis.c
[ ... ]
> +int nbl_hw_init_leonis(struct nbl_adapter *adapter)
> +{
[ ... ]
> +	if (common->has_ctrl) {
> +		/*
> +		 * The fixed 16MiB MEMORY BAR of PF0 contains both control
> +		 * register region and the 8KiB RDMA notify partition inside
> +		 * this single 16MiB window. The RDMA notify area does not
> +		 * occupy extra space outside the BAR range.
> +		 * We only map the front part of BAR by cutting off the last
> +		 * NBL_RDMA_NOTIFY_LEN bytes for hardware exclusive RDMA
> +		 * notification use,
> +		 * so the mapping length equals bar_len - NBL_RDMA_NOTIFY_LEN.
> +		 * Since the RDMA notify region is internal to the 16MiB BAR,
> +		 * the minimum BAR size check remains bar_len >=
> +		 * NBL_HW_REG_SPACE_SIZE to ensure full register space is
> +		 * available.
> +		 */
> +		if (bar_len < NBL_HW_REG_SPACE_SIZE) {
> +			dev_err(&pdev->dev,
> +				"MEMORY BAR len %pa too small for ctrl reg space\n",
> +				&bar_len);
> +			ret = -EINVAL;
> +			goto setup_mgt_fail;
> +		}
> +
> +		hw_mgt->hw_size = bar_len - NBL_RDMA_NOTIFY_LEN;
> +		hw_mgt->hw_addr =
> +			pcim_iomap(pdev, NBL_MEMORY_BAR,
> +				   hw_mgt->hw_size);

[Severity: Medium]
Will this map the hardware-exclusive RDMA notify region if the platform or
hypervisor assigns a BAR larger than 16 MiB (NBL_HW_REG_SPACE_SIZE)?

If bar_len > NBL_HW_REG_SPACE_SIZE, hw_size will span beyond the front part
of the fixed 16 MiB window and cover the RDMA notify region.

If an RDMA driver later attempts to map this same region with Write-Combining
(WC) attributes, could it conflict with the Ethernet driver's Uncacheable (UC)
mapping and cause x86 PAT attribute aliasing issues?

Should this calculation use NBL_HW_REG_SPACE_SIZE instead of bar_len?

> +	} else {
> +		if (bar_len < NBL_REG_NET_ONLY_LEN) {
[ ... ]
-- 
pw-bot: cr

  parent reply	other threads:[~2026-07-31  1:30 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-23  4:00 [PATCH v22 net-next 00/12] nbl driver for Nebulamatrix NICs illusion.wang
2026-07-23  4:00 ` [PATCH v22 net-next 01/12] net/nebula-matrix: add minimum nbl build framework illusion.wang
2026-07-31  1:10   ` Jakub Kicinski
2026-07-23  4:00 ` [PATCH v22 net-next 02/12] net/nebula-matrix: add core driver architecture and HW layer initialization illusion.wang
2026-07-30  9:18   ` 回复:[PATCH " Illusion Wang
2026-07-31  1:13   ` [PATCH " Jakub Kicinski
2026-07-31  1:30   ` Jakub Kicinski [this message]
2026-07-23  4:00 ` [PATCH v22 net-next 03/12] net/nebula-matrix: add channel wire opcode enum definitions illusion.wang
2026-07-23  4:00 ` [PATCH v22 net-next 04/12] net/nebula-matrix: add channel layer illusion.wang
2026-07-31  1:27   ` Jakub Kicinski
2026-07-31  1:30   ` Jakub Kicinski
2026-07-23  4:00 ` [PATCH v22 net-next 05/12] net/nebula-matrix: add common resource implementation illusion.wang
2026-07-31  1:30   ` Jakub Kicinski
2026-07-23  4:00 ` [PATCH v22 net-next 06/12] net/nebula-matrix: add intr " illusion.wang
2026-07-31  1:30   ` Jakub Kicinski
2026-07-23  4:00 ` [PATCH v22 net-next 07/12] net/nebula-matrix: add chip-wide hardware init/deinit implementation illusion.wang
2026-07-31  1:30   ` Jakub Kicinski
2026-07-23  4:01 ` [PATCH v22 net-next 08/12] net/nebula-matrix: dispatch: add control-level routing core infrastructure illusion.wang
2026-07-23  4:01 ` [PATCH v22 net-next 09/12] net/nebula-matrix: dispatch: add cross-version channel message framework illusion.wang
2026-07-31  1:30   ` Jakub Kicinski
2026-07-23  4:01 ` [PATCH v22 net-next 10/12] net/nebula-matrix: dispatch: add mutual exclusion lock for shared hardware resource ops illusion.wang
2026-07-31  1:30   ` Jakub Kicinski
2026-07-23  4:01 ` [PATCH v22 net-next 11/12] net/nebula-matrix: add common/ctrl dev init/remove operation illusion.wang
2026-07-31  1:30   ` Jakub Kicinski
2026-07-23  4:01 ` [PATCH v22 net-next 12/12] net/nebula-matrix: add common dev start/stop operation illusion.wang
2026-07-31  1:30   ` Jakub Kicinski
2026-07-31  1:29 ` [PATCH v22 net-next 00/12] nbl driver for Nebulamatrix NICs Jakub Kicinski

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