[RFC PATCH v1 07/17] hw/riscv: adapt the device tree of a CoVE guest

[Baolong Duan <blduan@linux.alibaba.com>]

A CoVE guest has neither wired interrupts nor a virtio-mmio transport,
and the TSM does not expose Zicboz to it, so drop the corresponding
device tree properties and nodes.

The kernel command line has to be added here as well: a CoVE guest does
not use the generic riscv_load_kernel() path that normally does it, and
the command line has to be in the device tree before it is measured.

Signed-off-by: Baolong Duan <blduan@linux.alibaba.com>
---
 hw/riscv/fdt-common.c |  4 ++-
 hw/riscv/virt.c       | 62 +++++++++++++++++++++++++++++++------------
 2 files changed, 48 insertions(+), 18 deletions(-)

diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c
index aa143a618b..c065724be4 100644
--- a/hw/riscv/fdt-common.c
+++ b/hw/riscv/fdt-common.c
@@ -11,6 +11,7 @@
 #include "qemu/error-report.h"
 #include "system/device_tree.h"
 #include "hw/core/boards.h"
+#include "hw/riscv/cove.h"
 #include "hw/riscv/fdt-common.h"
 #include "target/riscv/cpu_bits.h"
 
@@ -132,7 +133,8 @@ create_fdt_socket_cpu_internal(void *fdt, char *clust_name, RISCVCPU *cpu_ptr,
                                   cpu_ptr->cfg.cbom_blocksize);
         }
 
-        if (cpu_ptr->cfg.ext_zicboz) {
+        /* The TSM does not expose Zicboz to a CoVE guest. */
+        if (cpu_ptr->cfg.ext_zicboz && !riscv_cove_vm_active()) {
             qemu_fdt_setprop_cell(fdt, cpu_name, "riscv,cboz-block-size",
                                   cpu_ptr->cfg.cboz_blocksize);
         }
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index c15d8859ce..777859baa2 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -225,12 +225,15 @@ static void create_pcie_irq_map(RISCVVirtState *s, void *fdt, char *nodename,
         }
     }
 
-    qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map,
-                     PCI_NUM_PINS * PCI_NUM_PINS *
-                     irq_map_stride * sizeof(uint32_t));
-
-    qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask",
-                           0x1800, 0, 0, 0x7);
+    /* A CoVE guest only supports MSIs, so it has no interrupt map. */
+    if (!s->cove_vm) {
+        qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map,
+                         PCI_NUM_PINS * PCI_NUM_PINS *
+                         irq_map_stride * sizeof(uint32_t));
+
+        qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask",
+                               0x1800, 0, 0, 0x7);
+    }
 }
 
 static void create_fdt_socket_aclint(RISCVVirtState *s,
@@ -697,6 +700,14 @@ static void create_fdt_virtio(RISCVVirtState *s, uint32_t irq_virtio_phandle)
     MachineState *ms = MACHINE(s);
     hwaddr virtio_base = s->memmap[VIRT_VIRTIO].base;
 
+    /*
+     * A CoVE guest has no virtio-mmio transport, its virtio devices are
+     * attached to the PCIe host bridge instead.
+     */
+    if (s->cove_vm) {
+        return;
+    }
+
     for (i = 0; i < VIRTIO_COUNT; i++) {
         g_autofree char *name = NULL;
         uint64_t size = s->memmap[VIRT_VIRTIO].size;
@@ -819,11 +830,15 @@ static void create_fdt_uart(RISCVVirtState *s,
                                  2, s->memmap[VIRT_UART0].base,
                                  2, s->memmap[VIRT_UART0].size);
     qemu_fdt_setprop_cell(ms->fdt, name, "clock-frequency", 3686400);
-    qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_phandle);
-    if (s->aia_type == VIRT_AIA_TYPE_NONE) {
-        qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", UART0_IRQ);
-    } else {
-        qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", UART0_IRQ, 0x4);
+    /* A CoVE guest has no wired interrupts, the UART is polled. */
+    if (!s->cove_vm) {
+        qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
+                              irq_mmio_phandle);
+        if (s->aia_type == VIRT_AIA_TYPE_NONE) {
+            qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", UART0_IRQ);
+        } else {
+            qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", UART0_IRQ, 0x4);
+        }
     }
 
     qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", name);
@@ -844,12 +859,15 @@ static void create_fdt_rtc(RISCVVirtState *s,
     qemu_fdt_setprop_sized_cells(ms->fdt, name, "reg",
                                  2, s->memmap[VIRT_RTC].base,
                                  2, s->memmap[VIRT_RTC].size);
-    qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
-        irq_mmio_phandle);
-    if (s->aia_type == VIRT_AIA_TYPE_NONE) {
-        qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ);
-    } else {
-        qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4);
+    /* A CoVE guest has no wired interrupts, the RTC is polled. */
+    if (!s->cove_vm) {
+        qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent",
+            irq_mmio_phandle);
+        if (s->aia_type == VIRT_AIA_TYPE_NONE) {
+            qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", RTC_IRQ);
+        } else {
+            qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", RTC_IRQ, 0x4);
+        }
     }
 }
 
@@ -1021,6 +1039,16 @@ static void create_fdt(RISCVVirtState *s)
 
     qemu_fdt_add_subnode(ms->fdt, "/chosen");
 
+    /*
+     * The kernel command line of a CoVE guest has to be part of the device
+     * tree before it is measured, so it cannot be added by the generic
+     * riscv_load_kernel() path.
+     */
+    if (s->cove_vm && ms->kernel_cmdline && *ms->kernel_cmdline) {
+        qemu_fdt_setprop_string(ms->fdt, "/chosen", "bootargs",
+                                ms->kernel_cmdline);
+    }
+
     /* Pass seed to RNG */
     qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
     qemu_fdt_setprop(ms->fdt, "/chosen", "rng-seed",
-- 
2.34.1