From: <Roman.Li@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
Leo Li <sunpeng.li@amd.com>,
Aurabindo Pillai <aurabindo.pillai@amd.com>,
Roman Li <roman.li@amd.com>, Wayne Lin <wayne.lin@amd.com>,
Tom Chung <chiahsuan.chung@amd.com>,
"Fangzhi Zuo" <jerry.zuo@amd.com>,
Dan Wheeler <daniel.wheeler@amd.com>, Ray Wu <Ray.Wu@amd.com>,
Ivan Lipski <ivan.lipski@amd.com>, Alex Hung <alex.hung@amd.com>,
James Lin <PingLei.Lin@amd.com>,
Chenyu Chen <Chen-Yu.Chen@amd.com>
Subject: [PATCH 23/41] drm/amd/display: Align connector KUnit tests with stream validation refactor
Date: Fri, 31 Jul 2026 17:12:44 -0400 [thread overview]
Message-ID: <20260731211302.3040343-24-Roman.Li@amd.com> (raw)
In-Reply-To: <20260731211302.3040343-1-Roman.Li@amd.com>
From: Ivan Lipski <ivan.lipski@amd.com>
[Why&How]
Update the amdgpu_dm_connector KUnit tests for the new
fill_stream_properties_from_drm_display_mode() and create_stream_for_sink()
signatures, which now take an explicit pixel encoding and an is_hdmi_ep
flag instead of deriving the encoding from connector state.
- Pass PIXEL_ENCODING_RGB / is_hdmi_ep=false to all existing call sites.
- Add cases verifying the caller-selected encoding is applied verbatim
(YCbCr420/422/444), replacing the old display-info-derived behaviour.
- Add cases covering the is_hdmi_ep TMDS colour-depth clamp: depth is
reduced when over the sink limit on an HDMI endpoint and left untouched
otherwise.
Assisted-by: Copilot:claude-opus-4.8
Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
---
.../tests/amdgpu_dm_connector_test.c | 155 ++++++++++++++++--
1 file changed, 141 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connector_test.c b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connector_test.c
index 1a8f02c78c4d..1658d4d5997a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connector_test.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_connector_test.c
@@ -3416,7 +3416,8 @@ static void dm_test_fill_stream_borders_zeroed(struct kunit *test)
timing->v_border_bottom = 8;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 8);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->h_border_left, 0);
KUNIT_EXPECT_EQ(test, (int)timing->h_border_right, 0);
@@ -3437,7 +3438,8 @@ static void dm_test_fill_stream_rgb_defaults(struct kunit *test)
struct dc_crtc_timing *timing = &ctx->stream->timing;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 8);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->pixel_encoding, (int)PIXEL_ENCODING_RGB);
KUNIT_EXPECT_EQ(test, (int)timing->timing_3d_format,
@@ -3463,7 +3465,8 @@ static void dm_test_fill_stream_sync_polarity_positive(struct kunit *test)
ctx->mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 8);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->flags.HSYNC_POSITIVE_POLARITY, 1);
KUNIT_EXPECT_EQ(test, (int)timing->flags.VSYNC_POSITIVE_POLARITY, 1);
@@ -3482,7 +3485,8 @@ static void dm_test_fill_stream_sync_polarity_negative(struct kunit *test)
ctx->mode->flags = 0;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 8);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->flags.HSYNC_POSITIVE_POLARITY, 0);
KUNIT_EXPECT_EQ(test, (int)timing->flags.VSYNC_POSITIVE_POLARITY, 0);
@@ -3511,7 +3515,8 @@ static void dm_test_fill_stream_inherits_old_stream(struct kunit *test)
ctx->mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, old_stream, 8);
+ &ctx->aconnector->base, ctx->conn_state, old_stream, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->vic, 16);
KUNIT_EXPECT_EQ(test, (int)timing->flags.HSYNC_POSITIVE_POLARITY, 1);
@@ -3541,7 +3546,8 @@ static void dm_test_fill_stream_timing_from_crtc(struct kunit *test)
ctx->mode->crtc_clock = 148500;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 8);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->h_addressable, 1920);
KUNIT_EXPECT_EQ(test, (int)timing->h_total, 2200);
@@ -3568,7 +3574,8 @@ static void dm_test_fill_stream_color_depth_requested_bpc(struct kunit *test)
ctx->aconnector->base.display_info.bpc = 12;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 10);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 10,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->display_color_depth,
(int)COLOR_DEPTH_101010);
@@ -3585,7 +3592,8 @@ static void dm_test_fill_stream_content_type(struct kunit *test)
ctx->conn_state->content_type = DRM_MODE_CONTENT_TYPE_GRAPHICS;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 8);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)ctx->stream->content_type,
(int)DISPLAY_CONTENT_TYPE_GRAPHICS);
@@ -3603,12 +3611,121 @@ static void dm_test_fill_stream_aspect_ratio(struct kunit *test)
ctx->mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
- &ctx->aconnector->base, ctx->conn_state, NULL, 8);
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_EXPECT_EQ(test, (int)timing->aspect_ratio,
(int)ASPECT_RATIO_16_9);
}
+/**
+ * dm_test_fill_stream_encoding_from_caller_ycbcr420 - Test caller-selected 420
+ * @test: The KUnit test context
+ *
+ * The helper no longer derives the pixel encoding from the display info; it
+ * applies whatever the caller selected. Passing YCbCr420 must be honoured even
+ * though the DisplayPort sink advertises no YCbCr color formats.
+ */
+static void dm_test_fill_stream_encoding_from_caller_ycbcr420(struct kunit *test)
+{
+ struct dm_test_fill_ctx *ctx = dm_test_fill_ctx_alloc(test);
+ struct dc_crtc_timing *timing = &ctx->stream->timing;
+
+ fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_YCBCR420, false);
+
+ KUNIT_EXPECT_EQ(test, (int)timing->pixel_encoding,
+ (int)PIXEL_ENCODING_YCBCR420);
+}
+
+/**
+ * dm_test_fill_stream_encoding_from_caller_ycbcr422 - Test caller-selected 422
+ * @test: The KUnit test context
+ *
+ * A caller-selected YCbCr422 encoding is applied verbatim.
+ */
+static void dm_test_fill_stream_encoding_from_caller_ycbcr422(struct kunit *test)
+{
+ struct dm_test_fill_ctx *ctx = dm_test_fill_ctx_alloc(test);
+ struct dc_crtc_timing *timing = &ctx->stream->timing;
+
+ fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_YCBCR422, false);
+
+ KUNIT_EXPECT_EQ(test, (int)timing->pixel_encoding,
+ (int)PIXEL_ENCODING_YCBCR422);
+}
+
+/**
+ * dm_test_fill_stream_encoding_from_caller_ycbcr444 - Test caller-selected 444
+ * @test: The KUnit test context
+ *
+ * A caller-selected YCbCr444 encoding is applied verbatim.
+ */
+static void dm_test_fill_stream_encoding_from_caller_ycbcr444(struct kunit *test)
+{
+ struct dm_test_fill_ctx *ctx = dm_test_fill_ctx_alloc(test);
+ struct dc_crtc_timing *timing = &ctx->stream->timing;
+
+ fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
+ &ctx->aconnector->base, ctx->conn_state, NULL, 8,
+ PIXEL_ENCODING_YCBCR444, false);
+
+ KUNIT_EXPECT_EQ(test, (int)timing->pixel_encoding,
+ (int)PIXEL_ENCODING_YCBCR444);
+}
+
+/**
+ * dm_test_fill_stream_hdmi_ep_clamps_depth - Test HDMI TMDS depth clamp applied
+ * @test: The KUnit test context
+ *
+ * With is_hdmi_ep set the colour depth is clamped to what the sink's max TMDS
+ * clock allows: a 10bpc request that exceeds the limit is reduced to 8bpc.
+ */
+static void dm_test_fill_stream_hdmi_ep_clamps_depth(struct kunit *test)
+{
+ struct dm_test_fill_ctx *ctx = dm_test_fill_ctx_alloc(test);
+ struct dc_crtc_timing *timing = &ctx->stream->timing;
+
+ ctx->aconnector->base.display_info.bpc = 10;
+ /* 10bpc RGB needs 185625 KHz, over the sink's 160 MHz TMDS limit. */
+ ctx->aconnector->base.display_info.max_tmds_clock = 160000;
+ ctx->mode->crtc_clock = 148500;
+
+ fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
+ &ctx->aconnector->base, ctx->conn_state, NULL, 10,
+ PIXEL_ENCODING_RGB, true);
+
+ KUNIT_EXPECT_EQ(test, (int)timing->display_color_depth,
+ (int)COLOR_DEPTH_888);
+}
+
+/**
+ * dm_test_fill_stream_non_hdmi_ep_keeps_depth - Test no TMDS clamp off HDMI
+ * @test: The KUnit test context
+ *
+ * With is_hdmi_ep clear the TMDS clamp is skipped, so the same over-limit
+ * 10bpc request is left untouched. The clamp is HDMI-specific.
+ */
+static void dm_test_fill_stream_non_hdmi_ep_keeps_depth(struct kunit *test)
+{
+ struct dm_test_fill_ctx *ctx = dm_test_fill_ctx_alloc(test);
+ struct dc_crtc_timing *timing = &ctx->stream->timing;
+
+ ctx->aconnector->base.display_info.bpc = 10;
+ ctx->aconnector->base.display_info.max_tmds_clock = 160000;
+ ctx->mode->crtc_clock = 148500;
+
+ fill_stream_properties_from_drm_display_mode(ctx->stream, ctx->mode,
+ &ctx->aconnector->base, ctx->conn_state, NULL, 10,
+ PIXEL_ENCODING_RGB, false);
+
+ KUNIT_EXPECT_EQ(test, (int)timing->display_color_depth,
+ (int)COLOR_DEPTH_101010);
+}
+
/* Tests for create_stream_for_sink() */
/*
@@ -3687,7 +3804,8 @@ static void dm_test_create_stream_fake_sink_success(struct kunit *test)
struct dc_stream_state *stream;
stream = create_stream_for_sink(&ctx->aconnector->base, ctx->mode,
- ctx->dm_state, NULL, 8);
+ ctx->dm_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_ASSERT_NOT_NULL(test, stream);
dc_stream_release(stream);
@@ -3703,7 +3821,8 @@ static void dm_test_create_stream_sets_dm_context(struct kunit *test)
struct dc_stream_state *stream;
stream = create_stream_for_sink(&ctx->aconnector->base, ctx->mode,
- ctx->dm_state, NULL, 8);
+ ctx->dm_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_ASSERT_NOT_NULL(test, stream);
KUNIT_EXPECT_PTR_EQ(test, stream->dm_stream_context, ctx->aconnector);
@@ -3720,7 +3839,8 @@ static void dm_test_create_stream_virtual_signal(struct kunit *test)
struct dc_stream_state *stream;
stream = create_stream_for_sink(&ctx->aconnector->base, ctx->mode,
- ctx->dm_state, NULL, 8);
+ ctx->dm_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_ASSERT_NOT_NULL(test, stream);
KUNIT_EXPECT_EQ(test, (int)stream->signal, (int)SIGNAL_TYPE_VIRTUAL);
@@ -3739,7 +3859,8 @@ static void dm_test_create_stream_scaling_src(struct kunit *test)
struct dc_stream_state *stream;
stream = create_stream_for_sink(&ctx->aconnector->base, ctx->mode,
- ctx->dm_state, NULL, 8);
+ ctx->dm_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_ASSERT_NOT_NULL(test, stream);
KUNIT_EXPECT_EQ(test, (int)stream->src.width, 1920);
@@ -3770,7 +3891,8 @@ static void dm_test_create_stream_existing_sink(struct kunit *test)
ctx->aconnector->dc_sink = sink;
stream = create_stream_for_sink(&ctx->aconnector->base, ctx->mode,
- ctx->dm_state, NULL, 8);
+ ctx->dm_state, NULL, 8,
+ PIXEL_ENCODING_RGB, false);
KUNIT_ASSERT_NOT_NULL(test, stream);
KUNIT_EXPECT_PTR_EQ(test, stream->sink, sink);
@@ -5456,6 +5578,11 @@ static struct kunit_case amdgpu_dm_connector_tests[] = {
KUNIT_CASE(dm_test_fill_stream_color_depth_requested_bpc),
KUNIT_CASE(dm_test_fill_stream_content_type),
KUNIT_CASE(dm_test_fill_stream_aspect_ratio),
+ KUNIT_CASE(dm_test_fill_stream_encoding_from_caller_ycbcr420),
+ KUNIT_CASE(dm_test_fill_stream_encoding_from_caller_ycbcr422),
+ KUNIT_CASE(dm_test_fill_stream_encoding_from_caller_ycbcr444),
+ KUNIT_CASE(dm_test_fill_stream_hdmi_ep_clamps_depth),
+ KUNIT_CASE(dm_test_fill_stream_non_hdmi_ep_keeps_depth),
/* create_stream_for_sink */
KUNIT_CASE(dm_test_create_stream_fake_sink_success),
KUNIT_CASE(dm_test_create_stream_sets_dm_context),
--
2.34.1
next prev parent reply other threads:[~2026-07-31 21:16 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-31 21:12 [PATCH 00/41] DC Patches July 31, 2026 Roman.Li
2026-07-31 21:12 ` [PATCH 03/41] drm/amd/display: Enable DCN6 init Roman.Li
2026-07-31 21:12 ` [PATCH 04/41] drm/amd/display: Dependent changes for DCN6 Roman.Li
2026-07-31 21:12 ` [PATCH 05/41] drm/amd/display: Enable DCN6 sources compilation Roman.Li
2026-07-31 21:12 ` [PATCH 06/41] drm/amd/display: Remove duplicate in tests/Makefile Roman.Li
2026-07-31 21:12 ` [PATCH 07/41] drm/amd/display: Resize MST HDCP per-connector arrays to 32 Roman.Li
2026-07-31 21:12 ` [PATCH 08/41] drm/amd/display: Bounds-check connector->index in dm_dp_mst_get_modes Roman.Li
2026-07-31 21:12 ` [PATCH 09/41] drm/amd/display: Ensure dtbclk is enabled Roman.Li
2026-07-31 21:12 ` [PATCH 10/41] drm/amd/display: Update VRR info packet to support 12-bit refresh rates Roman.Li
2026-07-31 21:12 ` [PATCH 11/41] drm/amd/display: Gate HDMI FRL status polling on active FRL link rate Roman.Li
2026-07-31 21:12 ` [PATCH 12/41] drm/amd/display: Fix wb_info leak and NULL deref in writeback Roman.Li
2026-07-31 21:12 ` [PATCH 13/41] drm/amd/display: Fix seamless mode switch not triggering for HDR to SDR transition Roman.Li
2026-07-31 21:12 ` [PATCH 14/41] drm/amd/display: Add KUnit tests for more crtc functions Roman.Li
2026-07-31 21:12 ` [PATCH 15/41] drm/amd/display: Add vblank handling tests for crtc Roman.Li
2026-07-31 21:12 ` [PATCH 16/41] drm/amd/display: Add idle worker " Roman.Li
2026-07-31 21:12 ` [PATCH 17/41] drm/amd/display: Add active plane count " Roman.Li
2026-07-31 21:12 ` [PATCH 18/41] drm/amd/display: Add KUnit test for crtc vblank event completion Roman.Li
2026-07-31 21:12 ` [PATCH 19/41] drm/amd/display: Add KUnit tests for crtc set_vupdate_irq Roman.Li
2026-07-31 21:12 ` [PATCH 20/41] drm/amd/display: Add KUnit tests for crtc set_static_screen_optimze Roman.Li
2026-07-31 21:12 ` [PATCH 21/41] drm/amd/display: Refactor stream validation Roman.Li
2026-07-31 21:12 ` [PATCH 22/41] drm/amd/display: Unify force_yuv debugfs into force_yuv_pixel_format Roman.Li
2026-07-31 21:12 ` Roman.Li [this message]
2026-07-31 21:12 ` [PATCH 24/41] drm/amd/display: Increase fclk change latency on dcn351 Roman.Li
2026-07-31 21:12 ` [PATCH 25/41] drm/amd/display: Add KUnit tests for crtc set_vblank Roman.Li
2026-07-31 21:12 ` [PATCH 26/41] drm/amd/display: Cover crtc set_vblank workqueue branch Roman.Li
2026-07-31 21:12 ` [PATCH 27/41] drm/amd/display: Cover crtc vblank IPS self-refresh restore Roman.Li
2026-07-31 21:12 ` [PATCH 28/41] drm/amd/display: Cover crtc vblank restore replay-supported path Roman.Li
2026-07-31 21:12 ` [PATCH 29/41] drm/amd/display: Cover crtc destroy_state stream release Roman.Li
2026-07-31 21:12 ` [PATCH 30/41] drm/amd/display: Fix ABM over VABC Roman.Li
2026-07-31 21:12 ` [PATCH 31/41] drm/amd/display: Add missing DCN42B register defines Roman.Li
2026-07-31 21:12 ` [PATCH 32/41] drm/amd/display: Add missing DMUB CACP and PR definitions Roman.Li
2026-07-31 21:12 ` [PATCH 33/41] drm/amd/display: Add missing OTG_CRC1_SELECT mask for DCN3.2 Roman.Li
2026-07-31 21:12 ` [PATCH 34/41] drm/amd/display: Fix CRC engine 1 enable/disable on DCN3.1.2+ Roman.Li
2026-07-31 21:12 ` [PATCH 35/41] drm/amd/display: Configure all CRC engines in pipe CRC source path Roman.Li
2026-07-31 21:12 ` [PATCH 36/41] drm/amd/display: Fix more KUnit connector use-after-free bugs Roman.Li
2026-07-31 21:12 ` [PATCH 37/41] drm/amd/display: Update BW bounding box unconditionally for DCN6 Roman.Li
2026-07-31 21:12 ` [PATCH 38/41] drm/amd/display: switch max FFE level cap based on FRL link rate Roman.Li
2026-07-31 21:13 ` [PATCH 39/41] drm/amd/display: Add FFE level defaults Roman.Li
2026-07-31 21:13 ` [PATCH 40/41] drm/amd/display: Migrate color manager HW and fix MCM blend LUT issues Roman.Li
2026-07-31 21:13 ` [PATCH 41/41] drm/amd/display: Promote DC to 3.2.392 Roman.Li
2026-08-04 13:24 ` [PATCH 00/41] DC Patches July 31, 2026 Wheeler, Daniel
2026-08-04 21:15 ` Timur Kristóf
2026-08-05 20:03 ` Wheeler, Daniel
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