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From: sashiko-bot@kernel.org
To: "Gopikrishna Garmidi" <gopikrishna.garmidi@oss.qualcomm.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v5 3/5] arm64: dts: qcom: Add Kalambo CRD
Date: Sat, 01 Aug 2026 10:10:04 +0000	[thread overview]
Message-ID: <20260801101004.D8DD11F00AC4@smtp.kernel.org> (raw)
In-Reply-To: <20260801-b4-kalambo-crd-v5-3-22160abacf3d@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The `kalambo-crd.dts` file omits the `&tcsr` voltage supply definitions, leaving PHY reference clocks unpowered and breaking PCIe/USB.
--

--- Patch [3]: [PATCH v5 3/5] arm64: dts: qcom: Add Kalambo CRD ---
commit aae73b91eb59e39dd9b9d1a032d9f7954d0ab45c
Author: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>

arm64: dts: qcom: Add Kalambo CRD

This commit introduces support for the CRD based on the Qualcomm Kalambo SoC. 
It reuses the common CRD board description from Glymur while dropping PMIC 
nodes that are not present on this design.

> diff --git a/arch/arm64/boot/dts/qcom/kalambo-crd.dts b/arch/arm64/boot/dts/qcom/kalambo-crd.dts
> new file mode 100644
> index 0000000000000..b4441807f4602
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/kalambo-crd.dts
> @@ -0,0 +1,21 @@
[ ... ]
> +/ {
> +	model = "Qualcomm Technologies, Inc. Kalambo CRD";
> +	compatible = "qcom,kalambo-crd", "qcom,kalambo";
> +};

[Severity: High]
Does this board need a &tcsr node override to provide voltage supply
definitions for the PHY reference clocks?

Since kalambo-crd.dts omits the &tcsr node override, it fails to map the
board's PMIC LDOs (e.g., vreg_l2f_e1_0p83) to the TCSR's vdda-* supply
properties. The clock driver will likely fall back to dummy regulators,
meaning the hardware voltages are never turned on.

Because this board reuses glymur-crd.dtsi (which enables multiple PCIe and
USB nodes) but misses the &tcsr regulator block required by those PHYs
(which is present in sibling boards like glymur-crd.dts and mahua-crd.dts),
will core connectivity features fail to initialize or experience link
timeouts due to unpowered reference clocks?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260801-b4-kalambo-crd-v5-0-22160abacf3d@oss.qualcomm.com?part=3

  reply	other threads:[~2026-08-01 10:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-01 10:00 [PATCH v5 0/5] arm64: dts: qcom: Add Kalambo SoC and CRD Gopikrishna Garmidi
2026-08-01 10:00 ` [PATCH v5 1/5] dt-bindings: arm: qcom: Document Kalambo SoC and board Gopikrishna Garmidi
2026-08-01 10:00 ` [PATCH v5 2/5] arm64: dts: qcom: Add Kalambo SoC Gopikrishna Garmidi
2026-08-01 10:15   ` sashiko-bot
2026-08-01 10:00 ` [PATCH v5 3/5] arm64: dts: qcom: Add Kalambo CRD Gopikrishna Garmidi
2026-08-01 10:10   ` sashiko-bot [this message]
2026-08-01 10:00 ` [PATCH v5 4/5] firmware: qcom: scm: Allow QSEECOM on " Gopikrishna Garmidi
2026-08-01 10:00 ` [PATCH v5 5/5] soc: qcom: ubwc: Add Kalambo UBWC config Gopikrishna Garmidi

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