From: Arun Raghavan <arunr@valvesoftware.com>
To: Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>
Cc: <linux-sound@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Arun Raghavan <arunr@valvesoftware.com>,
Arun Raghavan <arun@arunraghavan.net>
Subject: [PATCH] ALSA: hda/core: Log stream DMA errors on interrupt
Date: Mon, 3 Aug 2026 15:07:52 -0700 [thread overview]
Message-ID: <20260803-master-v1-1-9bcedb736978@valvesoftware.com> (raw)
The stream descriptor status register reports FIFO and descriptor
errors, but these are currently cleared silently along with the rest
of the interrupt status. Log them, rate-limited, so DMA problems are
visible instead of only manifesting as audible glitches.
Observed on some AMD GPU HDMI audio controllers under specific low power
circumstances.
Signed-off-by: Arun Raghavan <arunr@valvesoftware.com>
Cc: Arun Raghavan <arun@arunraghavan.net>
---
sound/hda/core/controller.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/sound/hda/core/controller.c b/sound/hda/core/controller.c
index 69e11d62bbfa..5f1d2c132cec 100644
--- a/sound/hda/core/controller.c
+++ b/sound/hda/core/controller.c
@@ -682,6 +682,11 @@ int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
sd_status = snd_hdac_stream_readb(azx_dev, SD_STS);
snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK);
handled |= 1 << azx_dev->index;
+ if (sd_status & (SD_INT_FIFO_ERR | SD_INT_DESC_ERR)) {
+ dev_warn_ratelimited(bus->dev,
+ "stream %u dma error: 0x%02x\n",
+ azx_dev->index, sd_status);
+ }
if ((!azx_dev->substream && !azx_dev->cstream) ||
!azx_dev->running || !(sd_status & SD_INT_COMPLETE))
continue;
---
base-commit: 848acc8ffe1b7cd5f1bf427b93069becfebc2c9d
change-id: 20260803-master-48a36c6e70e0
Best regards,
--
Arun Raghavan <arunr@valvesoftware.com>
next reply other threads:[~2026-08-03 22:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 22:07 Arun Raghavan [this message]
2026-08-04 11:21 ` [PATCH] ALSA: hda/core: Log stream DMA errors on interrupt Takashi Iwai
2026-08-04 17:42 ` [External Mail] " Arun Raghavan
2026-08-04 18:18 ` Takashi Iwai
2026-08-05 20:56 ` Arun Raghavan
2026-08-06 6:30 ` Takashi Iwai
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