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Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wqqzq-0000000DN3w-1dqj; Mon, 03 Aug 2026 11:38:18 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 9DD2F3003DE; Mon, 03 Aug 2026 13:38:17 +0200 (CEST) Date: Mon, 3 Aug 2026 13:38:17 +0200 From: Peter Zijlstra To: Boqun Feng Cc: Ingo Molnar , Will Deacon , Waiman Long , Gary Guo , Alice Ryhl , Lyude Paul , Daniel Almeida , Onur =?iso-8859-1?Q?=D6zkan?= , Miguel Ojeda , Danilo Krummrich , linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org Subject: Re: [PATCH 10/24] preempt: Introduce HAS_SEPARATE_PREEMPT_RESCHED_BITS Message-ID: <20260803113817.GB687043@noisy.programming.kicks-ass.net> References: <20260731203031.13679-1-boqun@kernel.org> <20260731203031.13679-11-boqun@kernel.org> Precedence: bulk X-Mailing-List: rust-for-linux@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260731203031.13679-11-boqun@kernel.org> On Fri, Jul 31, 2026 at 01:30:11PM -0700, Boqun Feng wrote: > diff --git a/arch/x86/include/asm/preempt.h b/arch/x86/include/asm/preempt.h > index 1220656f3370..12353eeebc52 100644 > --- a/arch/x86/include/asm/preempt.h > +++ b/arch/x86/include/asm/preempt.h > @@ -24,18 +34,26 @@ DECLARE_PER_CPU_CACHE_HOT(int, __preempt_count); > */ > static __always_inline int preempt_count(void) > { > - return raw_cpu_read_4(__preempt_count) & ~PREEMPT_NEED_RESCHED; > + return __pc_op(read, __preempt_count) & ~PREEMPT_NEED_RESCHED; > } > > -static __always_inline void preempt_count_set(int pc) > +/* > + * unsigned long preempt count parameter works for both 32bit and 64bit cases: > + * > + * - For 32bit, "int" (the return of preempt_count()) and "unsigned long" have > + * the same size. > + * - For 64bit, the effective bits of a preempt count sits in 32bit, and we > + * reserve the NEED_RESCHED bit from the old count. > + */ The 64bit comment doesn't really make sense to me. > +static __always_inline void preempt_count_set(unsigned long pc) > { > - int old, new; > + unsigned long old, new; > > - old = raw_cpu_read_4(__preempt_count); > + old = __pc_op(read, __preempt_count); > do { > new = (old & PREEMPT_NEED_RESCHED) | > (pc & ~PREEMPT_NEED_RESCHED); > - } while (!raw_cpu_try_cmpxchg_4(__preempt_count, &old, new)); > + } while (!__pc_op(try_cmpxchg, __preempt_count, &old, new)); > } > diff --git a/include/linux/preempt.h b/include/linux/preempt.h > index 33fc4c814a9f..87d5367f986c 100644 > --- a/include/linux/preempt.h > +++ b/include/linux/preempt.h > @@ -30,18 +30,20 @@ > * NMI nesting depth is tracked in a separate per-CPU variable > * (nmi_nesting) to save bits in preempt_count. > * > - * PREEMPT_MASK: 0x000000ff > - * SOFTIRQ_MASK: 0x0000ff00 > - * HARDIRQ_DISABLE_MASK: 0x00ff0000 > - * HARDIRQ_MASK: 0x0f000000 > - * NMI_MASK: 0x10000000 > - * PREEMPT_NEED_RESCHED: 0x80000000 > + * 32bit HAS_SEPARATE_PREEMPT_RESCHED_BITS > + * > + * PREEMPT_MASK: 0x000000ff 0x00000000000000ff > + * SOFTIRQ_MASK: 0x0000ff00 0x000000000000ff00 > + * HARDIRQ_DISABLE_MASK: 0x00ff0000 0x0000000000ff0000 > + * HARDIRQ_MASK: 0x0f000000 0x000000000f000000 > + * NMI_MASK: 0x10000000 0x00000000f0000000 > + * PREEMPT_NEED_RESCHED: 0x80000000 0x8000000000000000 > */ Perhaps add a comment about how HAS_SEPARATE_PREEMPT_RESCHED_BITS really is about having PREEMPT_NEED_RESCHED in its own word, rather than preempt_count() being 64bit. Because as presented it is very easy to confuse these two options. Ideally it would explain the LOAD-STORE issue with NEED_RESCHED and point to ARM64 or something.