From: sashiko-bot@kernel.org
To: "Sai Krishna Musham" <sai.krishna.musham@amd.com>
Cc: linux-pci@vger.kernel.org, conor+dt@kernel.org, robh@kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 1/2] dt-bindings: PCI: amd-mdb: Add CPM6 support
Date: Mon, 03 Aug 2026 14:50:17 +0000 [thread overview]
Message-ID: <20260803145018.0D4F21F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260803144412.713639-2-sai.krishna.musham@amd.com>
> The AMD CPM6 PCIe controller is based on the Synopsys DesignWare PCIe IP.
> Add "intr" to snps,dw-pcie.yaml vendor-specific reg-names for the
> per-controller interrupt register region used by CPM6.
>
> Update amd,versal2-mdb-host.yaml with separate register definitions:
> - MDB5: 4 regions (slcr, config, dbi, atu)
> - CPM6: 5 regions (slcr, config, dbi, atu, intr)
>
> Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260803144412.713639-1-sai.krishna.musham@amd.com?part=1
next prev parent reply other threads:[~2026-08-03 14:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-03 14:44 [PATCH v3 0/2] pci: AMD: Add Versal2 CPM6 PCIe host controller support Sai Krishna Musham
2026-08-03 14:44 ` [PATCH v3 1/2] dt-bindings: PCI: amd-mdb: Add CPM6 support Sai Krishna Musham
2026-08-03 14:50 ` sashiko-bot [this message]
2026-08-03 14:44 ` [PATCH v3 2/2] PCI: amd-mdb: Add CPM6 host controller support Sai Krishna Musham
2026-08-03 14:58 ` sashiko-bot
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