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[34.48.4.250]) by smtp.gmail.com with ESMTPSA id 00721157ae682-81fcd0f87efsm62099257b3.33.2026.08.03.14.07.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 14:07:14 -0700 (PDT) From: Willem de Bruijn To: netdev@vger.kernel.org Cc: intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com, joshua.a.hay@intel.com, przemyslaw.kitszel@intel.com, Willem de Bruijn Date: Mon, 3 Aug 2026 17:06:23 -0400 Message-ID: <20260803210707.1912217-1-willemdebruijn.kernel@gmail.com> X-Mailer: git-send-email 2.55.0.629.g250fe7f194-goog MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1785791236; x=1786396036; darn=lists.osuosl.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to:content-type; bh=xs6AeFC6wzPPBL4PftXRtu7W3n9YFR5yhGm6HKUzTww=; b=O/CL+gOEHQuVzQrHV8k1lhuxi0/VQUmVXwU2HKJcpONNaINnwT1NsBlyfwaq1AZzpd ofXwI3X01BOQNwcSws717goBf9OCs6g8gQ2zCLa8lqJKRIPx5Yw+/dy1egz8MWFcTFXi 24CnCmrow52KrLINey/YDDzZDkDvgFveVAKsR/nXjxckDNVgtBHUmMgxJn/rI5xUjJa8 cDHN7JpedMe9025Nu98MELMmjXY3DMiaDlLfSyesWreDFAgJVK7unkoHNmv6KmHgX4Sm 9BEZQkBG/h+aeno3vFTz6DuE1xEMJaYchte1Ip9CLaj7Z9meR6+oWi2avOBuHylcYky5 yNhw== X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dmarc=pass (p=none dis=none) header.from=gmail.com X-Mailman-Original-Authentication-Results: smtp4.osuosl.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20251104 header.b=O/CL+gOE Subject: [Intel-wired-lan] [PATCH iwl-net v2] idpf: add missing cpu_to_le32 in idpf_tx_splitq_build_flow_desc X-BeenThere: intel-wired-lan@osuosl.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Intel Wired Ethernet Linux Kernel Driver Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-wired-lan-bounces@osuosl.org Sender: "Intel-wired-lan" From: Willem de Bruijn idpf_tx_splitq_build_flow_desc performs a 32-bit store to &cmd_dtype to set the 8-bit cmd_dtype and zero the adjacent 3-byte timestamp field in a single operation. Descriptors are in little endian. Add missing cpu_to_le32 and cast to __le32 to ensure the fields are written correctly also on big endian platforms. Fixes: 1a49cf814fe1 ("idpf: add Tx timestamp flows") Signed-off-by: Willem de Bruijn Reviewed-by: Tony Nguyen --- Changes v1 -> v2 - add Fixes tag, Tony's Reviewed-by and Cc: intel-wired-lan@lists.osuosl.org v1: https://lore.kernel.org/netdev/20260731103137.4000876-1-willemdebruijn.kernel@gmail.com/ --- drivers/net/ethernet/intel/idpf/idpf_txrx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.c b/drivers/net/ethernet/intel/idpf/idpf_txrx.c index c724d429a7aa..91ca75e45463 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_txrx.c +++ b/drivers/net/ethernet/intel/idpf/idpf_txrx.c @@ -2408,7 +2408,7 @@ void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc, struct idpf_tx_splitq_params *params, u16 td_cmd, u16 size) { - *(u32 *)&desc->flow.qw1.cmd_dtype = (u8)(params->dtype | td_cmd); + *(__le32 *)&desc->flow.qw1.cmd_dtype = cpu_to_le32((u8)(params->dtype | td_cmd)); desc->flow.qw1.rxr_bufsize = cpu_to_le16((u16)size); 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[34.48.4.250]) by smtp.gmail.com with ESMTPSA id 00721157ae682-81fcd0f87efsm62099257b3.33.2026.08.03.14.07.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 14:07:14 -0700 (PDT) From: Willem de Bruijn To: netdev@vger.kernel.org Cc: intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com, joshua.a.hay@intel.com, przemyslaw.kitszel@intel.com, Willem de Bruijn Subject: [PATCH iwl-net v2] idpf: add missing cpu_to_le32 in idpf_tx_splitq_build_flow_desc Date: Mon, 3 Aug 2026 17:06:23 -0400 Message-ID: <20260803210707.1912217-1-willemdebruijn.kernel@gmail.com> X-Mailer: git-send-email 2.55.0.629.g250fe7f194-goog Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Willem de Bruijn idpf_tx_splitq_build_flow_desc performs a 32-bit store to &cmd_dtype to set the 8-bit cmd_dtype and zero the adjacent 3-byte timestamp field in a single operation. Descriptors are in little endian. Add missing cpu_to_le32 and cast to __le32 to ensure the fields are written correctly also on big endian platforms. Fixes: 1a49cf814fe1 ("idpf: add Tx timestamp flows") Signed-off-by: Willem de Bruijn Reviewed-by: Tony Nguyen --- Changes v1 -> v2 - add Fixes tag, Tony's Reviewed-by and Cc: intel-wired-lan@lists.osuosl.org v1: https://lore.kernel.org/netdev/20260731103137.4000876-1-willemdebruijn.kernel@gmail.com/ --- drivers/net/ethernet/intel/idpf/idpf_txrx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.c b/drivers/net/ethernet/intel/idpf/idpf_txrx.c index c724d429a7aa..91ca75e45463 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_txrx.c +++ b/drivers/net/ethernet/intel/idpf/idpf_txrx.c @@ -2408,7 +2408,7 @@ void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc, struct idpf_tx_splitq_params *params, u16 td_cmd, u16 size) { - *(u32 *)&desc->flow.qw1.cmd_dtype = (u8)(params->dtype | td_cmd); + *(__le32 *)&desc->flow.qw1.cmd_dtype = cpu_to_le32((u8)(params->dtype | td_cmd)); desc->flow.qw1.rxr_bufsize = cpu_to_le16((u16)size); desc->flow.qw1.compl_tag = cpu_to_le16(params->compl_tag); } -- 2.55.0.629.g250fe7f194-goog