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Mon, 03 Aug 2026 15:35:45 -0700 (PDT) Received: from ryzen.lan ([2601:644:8000:7a86::e35]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84edc2d4473sm4186790b3a.40.2026.08.03.15.35.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 15:35:44 -0700 (PDT) From: Rosen Penev To: linux-gpio@vger.kernel.org Cc: Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Linus Walleij , Bartosz Golaszewski , linuxppc-dev@lists.ozlabs.org (open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)), linux-kernel@vger.kernel.org (open list) Subject: [PATCHv2 2/8] gpio: ppc44x: update all 4xx to 44x Date: Mon, 3 Aug 2026 15:35:33 -0700 Message-ID: <20260803223539.86303-3-rosenp@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260803223539.86303-1-rosenp@gmail.com> References: <20260803223539.86303-1-rosenp@gmail.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The kernel lost support for 4xx platforms and now only supports 44x. Since this driver is being moved to drivers/gpio/ , take the opportunity to modernize the name. Signed-off-by: Rosen Penev --- drivers/gpio/gpio-ppc44x.c | 68 +++++++++++++++++++------------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/drivers/gpio/gpio-ppc44x.c b/drivers/gpio/gpio-ppc44x.c index 4413a94cf7a6..9b874ff8b124 100644 --- a/drivers/gpio/gpio-ppc44x.c +++ b/drivers/gpio/gpio-ppc44x.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * PPC4xx gpio driver + * PPC44x gpio driver * * Copyright (c) 2008 Harris Corporation * Copyright (c) 2008 Sascha Hauer , Pengutronix @@ -23,7 +23,7 @@ #define GPIO_MASK2(gpio) (0xc0000000 >> ((gpio) * 2)) /* Physical GPIO register layout */ -struct ppc4xx_gpio { +struct ppc44x_gpio { __be32 or; __be32 tcr; __be32 osrl; @@ -44,7 +44,7 @@ struct ppc4xx_gpio { __be32 isr3h; }; -struct ppc4xx_gpio_chip { +struct ppc44x_gpio_chip { struct gpio_chip gc; void __iomem *regs; spinlock_t lock; @@ -56,19 +56,19 @@ struct ppc4xx_gpio_chip { * There are a maximum of 32 gpios in each gpio controller. */ -static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio) +static int ppc44x_gpio_get(struct gpio_chip *gc, unsigned int gpio) { - struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); - struct ppc4xx_gpio __iomem *regs = chip->regs; + struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc); + struct ppc44x_gpio __iomem *regs = chip->regs; return !!(in_be32(®s->ir) & GPIO_MASK(gpio)); } static inline void -__ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) +__ppc44x_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) { - struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); - struct ppc4xx_gpio __iomem *regs = chip->regs; + struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc); + struct ppc44x_gpio __iomem *regs = chip->regs; if (val) setbits32(®s->or, GPIO_MASK(gpio)); @@ -76,14 +76,14 @@ __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) clrbits32(®s->or, GPIO_MASK(gpio)); } -static int ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) +static int ppc44x_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) { - struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); + struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc); unsigned long flags; spin_lock_irqsave(&chip->lock, flags); - __ppc4xx_gpio_set(gc, gpio, val); + __ppc44x_gpio_set(gc, gpio, val); spin_unlock_irqrestore(&chip->lock, flags); @@ -92,10 +92,10 @@ static int ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) return 0; } -static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) +static int ppc44x_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) { - struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); - struct ppc4xx_gpio __iomem *regs = chip->regs; + struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc); + struct ppc44x_gpio __iomem *regs = chip->regs; unsigned long flags; spin_lock_irqsave(&chip->lock, flags); @@ -121,16 +121,16 @@ static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) } static int -ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) +ppc44x_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) { - struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc); - struct ppc4xx_gpio __iomem *regs = chip->regs; + struct ppc44x_gpio_chip *chip = gpiochip_get_data(gc); + struct ppc44x_gpio __iomem *regs = chip->regs; unsigned long flags; spin_lock_irqsave(&chip->lock, flags); /* First set initial value */ - __ppc4xx_gpio_set(gc, gpio, val); + __ppc44x_gpio_set(gc, gpio, val); /* Disable open-drain function */ clrbits32(®s->odr, GPIO_MASK(gpio)); @@ -154,11 +154,11 @@ ppc4xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) return 0; } -static int ppc4xx_gpio_probe(struct platform_device *ofdev) +static int ppc44x_gpio_probe(struct platform_device *ofdev) { struct device *dev = &ofdev->dev; struct device_node *np = dev->of_node; - struct ppc4xx_gpio_chip *chip; + struct ppc44x_gpio_chip *chip; struct gpio_chip *gc; chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); @@ -172,10 +172,10 @@ static int ppc4xx_gpio_probe(struct platform_device *ofdev) gc->parent = dev; gc->base = -1; gc->ngpio = 32; - gc->direction_input = ppc4xx_gpio_dir_in; - gc->direction_output = ppc4xx_gpio_dir_out; - gc->get = ppc4xx_gpio_get; - gc->set = ppc4xx_gpio_set; + gc->direction_input = ppc44x_gpio_dir_in; + gc->direction_output = ppc44x_gpio_dir_out; + gc->get = ppc44x_gpio_get; + gc->set = ppc44x_gpio_set; gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); if (!gc->label) @@ -188,24 +188,24 @@ static int ppc4xx_gpio_probe(struct platform_device *ofdev) return devm_gpiochip_add_data(dev, gc, chip); } -static const struct of_device_id ppc4xx_gpio_match[] = { +static const struct of_device_id ppc44x_gpio_match[] = { { .compatible = "ibm,ppc4xx-gpio", }, {}, }; -MODULE_DEVICE_TABLE(of, ppc4xx_gpio_match); +MODULE_DEVICE_TABLE(of, ppc44x_gpio_match); -static struct platform_driver ppc4xx_gpio_driver = { - .probe = ppc4xx_gpio_probe, +static struct platform_driver ppc44x_gpio_driver = { + .probe = ppc44x_gpio_probe, .driver = { - .name = "ppc4xx-gpio", - .of_match_table = ppc4xx_gpio_match, + .name = "ppc44x-gpio", + .of_match_table = ppc44x_gpio_match, }, }; -static int __init ppc4xx_gpio_init(void) +static int __init ppc44x_gpio_init(void) { - return platform_driver_register(&ppc4xx_gpio_driver); + return platform_driver_register(&ppc44x_gpio_driver); } -arch_initcall(ppc4xx_gpio_init); +arch_initcall(ppc44x_gpio_init); -- 2.55.0