From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5FB4352000 for ; Mon, 3 Aug 2026 23:26:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785799577; cv=none; b=kwfM3UC0pNH6GoRg1Csh/Fbr/a9mPnOAytI5XlA0wa1FzStvZ96unBMfJ/mi3YEomUapRGkY9LRaNCcBtmFB/NxqsmfkdUqVd2OYptnLPXl2br4HzH54PXXj3CQQsIQSf/iRlfjBmgwycSTeoh6sxaY++w1wZcLJGQBW8CiGV1A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785799577; c=relaxed/simple; bh=SdVFOf1GC0SgxU6JTxq9J55mv2eIvxm9KXr28OUjriI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=afHgEFHObLenumRvNrcqPaqODYJHRaQLhL8acuzR9UPhCm7PZk3WB21HgjhIIxw771T744VmtlHu+p7c1zqxkrbDZH3VBwVDASM0/qkWa8N7mH4AeiHGxOelOd15zyS1dAHcQUQVAa1w49YiAYeVHIP1qr/devoVEFlztuDQUiE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UfCs+wU7; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UfCs+wU7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1785799575; x=1817335575; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SdVFOf1GC0SgxU6JTxq9J55mv2eIvxm9KXr28OUjriI=; b=UfCs+wU7MLTNTRCBmUYzMjNHMEaWyRiMtuMoobUTFBLq6WrXBwVVzpRJ /yynP7MCURD105y4608+yCbhcNIUfSdfKirkxwAXpybQKkId4TMeMhXGl fIZpgJ6+l0DwPiJn5kE5RqYytYVuGhRiTRe9eysM+YDW9+kYZCuezT/+S bbr1aAIJ6C2Cxz8WhyaLKyhsVu99hVwoi7Y5SEd6bKHjKBI1/pJF1n2Gw 8JaC3vsmpMl56P0Jvlq8rgt4cjpvkk2gDnqqFPgBkaTq3pPwh5F/wH9RV v43lqRFqsXTYuQP/qCDs/nXrJCDliAkB//52zVT4KIsF67d/rLTbg/v9S Q==; X-CSE-ConnectionGUID: MrLHSdfQTYCo1KaOYEXwhA== X-CSE-MsgGUID: 7aaqQLb6RVyv/GIuEC21Qw== X-IronPort-AV: E=McAfee;i="6800,10657,11864"; a="90232407" X-IronPort-AV: E=Sophos;i="6.25,203,1779174000"; d="scan'208";a="90232407" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2026 16:26:12 -0700 X-CSE-ConnectionGUID: Emuc4r6CQGKYFkOreij4NA== X-CSE-MsgGUID: KOG5nCbwRZGopqUo0lHAGA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,203,1779174000"; d="scan'208";a="261932552" Received: from orsosgc001.jf.intel.com ([10.88.27.185]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Aug 2026 16:26:13 -0700 From: Ashutosh Dixit To: stable@vger.kernel.org Cc: Sasha Levin , Greg Kroah-Hartman Subject: [PATCH 6.18.y 02/10] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists Date: Mon, 3 Aug 2026 16:26:00 -0700 Message-ID: <20260803232608.3276045-3-ashutosh.dixit@intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260803232608.3276045-1-ashutosh.dixit@intel.com> References: <20260803232608.3276045-1-ashutosh.dixit@intel.com> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit [ Upstream commit 90511bdcfda97211c01f1d945d4ea616578d8fca ] Unconditionally whitelisting OA registers is a security violation. Set RING_FORCE_TO_NONPRIV_DENY bit in OA nonpriv slots, so that OA registers don't get whitelisted by default after probe, gt reset, resume and engine reset. Fixes: 828a8eaf37c3 ("drm/xe/oa: Add MMIO trigger support") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Umesh Nerlige Ramappa Signed-off-by: Ashutosh Dixit Reviewed-by: Umesh Nerlige Ramappa Link: https://patch.msgid.link/20260615224227.34880-2-ashutosh.dixit@intel.com --- drivers/gpu/drm/xe/xe_reg_whitelist.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c index 47fb3e74b567c..5cb7e0e3a66bd 100644 --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c @@ -67,10 +67,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = { XE_RTP_ACTIONS(WHITELIST(CSBE_DEBUG_STATUS(RENDER_RING_BASE), 0)) }, +#define WHITELIST_DENY(r, f) WHITELIST(r, (f) | RING_FORCE_TO_NONPRIV_DENY) + #define WHITELIST_OA_MMIO_TRG(trg, status, head) \ - WHITELIST(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ - WHITELIST(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ - WHITELIST(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) + WHITELIST_DENY(trg, RING_FORCE_TO_NONPRIV_ACCESS_RW), \ + WHITELIST_DENY(status, RING_FORCE_TO_NONPRIV_ACCESS_RD), \ + WHITELIST_DENY(head, RING_FORCE_TO_NONPRIV_ACCESS_RD | RING_FORCE_TO_NONPRIV_RANGE_4) #define WHITELIST_OAG_MMIO_TRG \ WHITELIST_OA_MMIO_TRG(OAG_MMIOTRIGGER, OAG_OASTATUS, OAG_OAHEADPTR) -- 2.54.0