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From: Simon Xu <simonxhy0404@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Owen Giles <owen.giles@hpe.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,
	Robert Elliott <elliott@hpe.com>,
	Simon Xu <simonxhy0404@gmail.com>
Subject: [PATCH v2 5/9] hw/misc/iotkit-secctl.c: add SSE-310 support
Date: Wed,  5 Aug 2026 10:30:01 -0500	[thread overview]
Message-ID: <20260805153005.9989-6-simonxhy0404@gmail.com> (raw)
In-Reply-To: <20260805153005.9989-1-simonxhy0404@gmail.com>

Add SSE-310 secure and non-secure ID registers.

Reviewed-by: Owen Giles <owen.giles@hpe.com>
Reviewed-by: Robert Elliott <elliott@hpe.com>
Signed-off-by: Simon Xu <simonxhy0404@gmail.com>
---
v1 -> v2
	With the bug fix from the previous patch	
---
 hw/misc/iotkit-secctl.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
index 93753c2ced..9f6fb81088 100644
--- a/hw/misc/iotkit-secctl.c
+++ b/hw/misc/iotkit-secctl.c
@@ -109,6 +109,18 @@ static const uint8_t iotkit_secctl_ns_sse300_idregs[] = {
     0x0d, 0xf0, 0x05, 0xb1,
 };
 
+static const uint8_t iotkit_secctl_s_sse310_idregs[] = {
+    0x04, 0x00, 0x00, 0x00,
+    0x52, 0xb8, 0x3b, 0x00,
+    0x0d, 0xf0, 0x05, 0xb1,
+};
+
+static const uint8_t iotkit_secctl_ns_sse310_idregs[] = {
+    0x04, 0x00, 0x00, 0x00,
+    0x53, 0xb8, 0x3b, 0x00,
+    0x0d, 0xf0, 0x05, 0xb1,
+};
+
 
 /* The register sets for the various PPCs (AHB internal, APB internal,
  * AHB expansion, APB expansion) are all set up so that they are
@@ -232,6 +244,9 @@ static MemTxResult iotkit_secctl_s_read(void *opaque, hwaddr addr,
         case ARMSSE_SSE300:
             r = iotkit_secctl_s_sse300_idregs[(offset - A_PID4) / 4];
             break;
+        case ARMSSE_SSE310:
+            r = iotkit_secctl_s_sse310_idregs[(offset - A_PID4) / 4];
+            break;
         default:
             r = iotkit_secctl_s_idregs[(offset - A_PID4) / 4];
             break;
@@ -499,6 +514,9 @@ static MemTxResult iotkit_secctl_ns_read(void *opaque, hwaddr addr,
         case ARMSSE_SSE300:
             r = iotkit_secctl_ns_sse300_idregs[(offset - A_PID4) / 4];
             break;
+        case ARMSSE_SSE310:
+            r = iotkit_secctl_ns_sse310_idregs[(offset - A_PID4) / 4];
+            break;
         default:
             r = iotkit_secctl_ns_idregs[(offset - A_PID4) / 4];
             break;
-- 
2.53.0



  parent reply	other threads:[~2026-08-05 15:32 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-05 15:29 [PATCH v2 0/9] arm: add Cortex-M85, SSE-310, and mps3-an555 Simon Xu
2026-08-05 15:29 ` [PATCH v2 1/9] target/arm/tcg/cpu-v7m.c: add cortex-m85 model Simon Xu
2026-08-05 15:29 ` [PATCH v2 2/9] hw/arm/armsse: add Arm Corstone SSE-310 Simon Xu
2026-08-17 15:23   ` Peter Maydell
2026-08-05 15:29 ` [PATCH v2 3/9] hw/misc/iotkit-sysctl.c: add SSE-310 support Simon Xu
2026-08-17 15:30   ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 4/9] hw/misc/iotkit-secctl.c: fix AHB secure read Simon Xu
2026-08-17 15:33   ` Peter Maydell
2026-08-05 15:30 ` Simon Xu [this message]
2026-08-17 15:34   ` [PATCH v2 5/9] hw/misc/iotkit-secctl.c: add SSE-310 support Peter Maydell
2026-08-05 15:30 ` [PATCH v2 6/9] hw/misc/iotkit-secctl.c: use GNU C case ranges Simon Xu
2026-08-17 15:38   ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 7/9] hw/misc/iotkit-sysinfo.c: add SSE-310 support Simon Xu
2026-08-17 15:38   ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 8/9] hw/arm/mps2-tz.c add Arm mps3-an555 board Simon Xu
2026-08-17 15:50   ` Peter Maydell
2026-08-05 15:30 ` [PATCH v2 9/9] hw/misc/mps2-fpgaio.c: add GPIOALT2 register Simon Xu
2026-08-17 15:49   ` Peter Maydell

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