From: Jinyu Tang <jinyu.tang@linux.dev>
To: Will Deacon <will@kernel.org>
Cc: kvm@vger.kernel.org,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Anup Patel <apatel@ventanamicro.com>,
Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [RFC PATCH 0/2] PCI bus/CPU address translation for MMIO
Date: Sun, 9 Aug 2026 11:02:12 +0800 [thread overview]
Message-ID: <20260809030212.274097-1-jinyu.tang@linux.dev> (raw)
In-Reply-To: <alero77xVv6xrw6i@willie-the-truck>
On Wed, Jul 15, 2026 at 04:47:47PM +0100, Will Deacon wrote:
> On Wed, Jul 01, 2026 at 10:26:52PM +0800, Jinyu Tang wrote:
> > This series adds PCI bus/CPU address translation hooks with an identity
> > default, then wires up RISC-V to exercise a non-identity PCI MMIO window
> > through a new --pci-mmio-cpu-base option.
>
> Why is that something a user would want to do?
I added it as a simple way to exercise a non-identity PCI host bridge
window without adding a new machine type.
The main case is for VFIO MMIO. PCI BAR values are bus addresses,
while KVM installs VFIO BAR mappings/traps at guest CPU physical
addresses. Linux appears to make the same distinction when probing BARs:
pcibios_bus_to_resource() converts the BAR bus address to the CPU
resource address before it is used. Some real systems also appear to have
such non-identity PCI host bridge windows, for example the PCIe host
described in arch/arm64/boot/dts/hisilicon/hi3660.dtsi.
I added the option in this RFC to help validate kvmtool with our
in-development platform model, but I can remove it in v2. I think
kvmtool can add the internal PCI bus/CPU translation for non-identity
PCI windows.
Thanks,
Jinyu
prev parent reply other threads:[~2026-08-09 3:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 14:26 [RFC PATCH 0/2] PCI bus/CPU address translation for MMIO Jinyu Tang
2026-07-01 14:26 ` [RFC PATCH 1/2] pci: translate BAR addresses for MMIO users Jinyu Tang
2026-07-01 14:26 ` [RFC PATCH 2/2] riscv: allow a non-identity PCI MMIO CPU base Jinyu Tang
2026-07-15 15:47 ` [RFC PATCH 0/2] PCI bus/CPU address translation for MMIO Will Deacon
2026-08-09 3:02 ` Jinyu Tang [this message]
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