Re: [PATCH v5 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly added thermal zones lack the `polling-delay` property, meaning the thermal framework will never autonomously read these polled sensors, rendering the trip points completely inactive.
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--- Patch [3]: [PATCH v5 3/4] arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform ---
commit e095016b4e3d3900333619bed0a4f6e72a9a0497
Author: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>

arm64: dts: qcom: Add PMIC thermal support for Shikra CQ2390M SoM platform

This commit adds ADC channels for pa, quiet, and msm thermistors along with
their respective ADC thermal bridge nodes. It also creates thermal zones for
PMIC thermal mitigation on the Shikra CQ2390M SoM platform.

> diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
> index 8ac42ff625a0e..9caff1a70d13d 100644
> --- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
> +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
[ ... ]
> @@ -32,6 +33,68 @@ key-volume-up {
>  		};
>  	};
>  
> +	msm_therm_bridge: msm-therm-bridge {
> +		compatible = "generic-adc-thermal";
> +		io-channels = <&pm4125_adc ADC5_AMUX_THM3_100K_PU>;
> +		io-channel-names = "sensor-channel";
> +		#thermal-sensor-cells = <0>;
> +	};
> +
[ ... ]
> +	thermal-zones {
> +		sys-1-thermal {
> +			polling-delay-passive = <2000>;
> +			thermal-sensors = <&pa_therm_bridge>;

[Severity: High]
Will this thermal zone ever be autonomously evaluated by the thermal core?

The zone defines polling-delay-passive but omits the standard polling-delay
property, which defaults to 0 (disabling non-passive polling). Because this
zone only defines a "hot" trip point and lacks any "passive" trip points,
passive cooling mitigation is never engaged.

Since the generic-adc-thermal bridges rely on polling and lack hardware
interrupts, omitting polling-delay means the thermal core might never
schedule its poll queue. Does this prevent PMIC thermal mitigation from
triggering during an overheating event?

This also applies to sys-2-thermal and sys-3-thermal below.

> +
> +			trips {
> +				active-config0 {
> +					temperature = <80000>;
> +					hysteresis = <2000>;
> +					type = "hot";
> +				};
> +			};
> +		};
> +
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260809-shikra_adc_support-v5-0-bf6882d18bad@oss.qualcomm.com?part=3