From: Rob Herring <robh@kernel.org>
To: Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Brian Masney <bmasney@redhat.com>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org,
Vyacheslav Yurkov <uvv.mail@gmail.com>
Subject: Re: [PATCH v4 1/2] dt-bindings: Add GPIO-locked fixed clock
Date: Mon, 10 Aug 2026 11:54:03 -0500 [thread overview]
Message-ID: <20260810165403.GA2145873-robh@kernel.org> (raw)
In-Reply-To: <20260810164000.GA1846263-robh@kernel.org>
On Mon, Aug 10, 2026 at 11:40:00AM -0500, Rob Herring wrote:
> On Sun, Jul 26, 2026 at 05:40:24PM +0000, Vyacheslav Yurkov wrote:
> > Some hardware designs provide fixed-frequency clocks generated outside
> > software control, such as by FPGA-resident PLLs. While the clock rate is
> > fixed, a separate GPIO signal indicates whether the clock source is
> > locked and producing a valid output.
> >
> > Describe a GPIO-locked fixed clock provider that exposes a fixed-rate
> > clock whose availability depends on one or more GPIO lock-status
> > signals.
> >
> > Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
>
> I think you can drop this. Just update your author email.
>
> > Signed-off-by: Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
> > ---
> > .../bindings/clock/gpio-locked-fixed-clock.yaml | 59 ++++++++++++++++++++++
> > 1 file changed, 59 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/gpio-locked-fixed-clock.yaml b/Documentation/devicetree/bindings/clock/gpio-locked-fixed-clock.yaml
> > new file mode 100644
> > index 000000000000..4d17889c51ad
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/gpio-locked-fixed-clock.yaml
> > @@ -0,0 +1,59 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/gpio-locked-fixed-clock.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: GPIO Locked Fixed Clock
> > +
> > +maintainers:
> > + - Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
> > +
> > +properties:
> > + compatible:
> > + const: gpio-locked-fixed-clock
> > +
> > + "#clock-cells":
> > + const: 0
> > +
> > + clocks:
> > + description: Input clocks whose validity is monitored by this provider.
> > +
> > + clock-output-names:
> > + description: Names of the clock provided by this controller.
> > + maxItems: 1
> > +
> > + locked-gpios:
> > + description: |
>
> Don't need '|' if no formatting.
>
> > + GPIOs to check the lock state.
> > + minItems: 1
> > + maxItems: 32
>
> Please explain better how multiple GPIOs work? Why would you ever have
> more than 1 lock signal per clock? And you can only have 1 clock given
> #clock-cells==0.
>
> Do you have an immediate need for more than 1? If not, I'd drop
> support for it for now.
I missed that this is N input clocks and 1 output clock. But that leads
to other questions. You've implemented a clock mux then? I still don't
understand for what h/w that makes sense. Which input clock is selected?
The locked one?
Rob
next prev parent reply other threads:[~2026-08-10 16:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-26 17:40 [PATCH v4 0/2] A proposal to add a gpio-locked fixed clock driver Vyacheslav Yurkov via B4 Relay
2026-07-26 17:40 ` Vyacheslav Yurkov
2026-07-26 17:40 ` [PATCH v4 1/2] dt-bindings: Add GPIO-locked fixed clock Vyacheslav Yurkov via B4 Relay
2026-07-26 17:40 ` Vyacheslav Yurkov
2026-07-26 17:45 ` sashiko-bot
2026-08-10 16:40 ` Rob Herring
2026-08-10 16:54 ` Rob Herring [this message]
2026-08-10 16:58 ` Conor Dooley
2026-07-26 17:40 ` [PATCH v4 2/2] clk: Add gpio-locked fixed clock driver Vyacheslav Yurkov via B4 Relay
2026-07-26 17:40 ` Vyacheslav Yurkov
2026-07-26 17:51 ` sashiko-bot
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